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ST150M User Manual
Confidential & Proprietary Information
9150-0125-01 R-1
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
VIH
Input High Voltage
0.7VDD
–
VDD
V
VIL
Input Low Voltage
VSS
–
0.3VDD
V
VOH
Output High Voltage
2.9
–
VDD
V
VOL
Output Low Voltage
VSS
–
0.4
V
IOL,SD
Current at VSS+0.4 V, output
set low, standard drive
1
2
4
mA
IOL,HDH
Current at VSS+0.4 V, output
set low, high drive
6
10
15
mA
IOH,SD
Current at VDD-0.4 V, output
set high, standard drive
1
2
4
mA
IOH,SD
Current at VDD-0.4 V, output
set high, high drive
6
9
14
mA
RPU
Internal Pull-up Resistance
11
13
16
kOhm
RPD
Internal Pull-down Resistance
11
13
16
kOhm
4.2.2 COMPARATOR
The comparator (COMP) compares an input voltage (VIN+) against a second input voltage (VIN-). VIN+ can be derived from an
analog input pin (AIN0-AIN7). VIN- can be derived from multiple sources depending on the operation mode of the comparator.
Main features of the comparator are:
• Input range from 0 V to VDD
• Single-ended mode
• Fully flexible hysteresis using a 64-level reference ladder
• Differential mode
• Configurable 50 mV hysteresis
• Reference inputs (VREF): VDD
• External reference from AIN0 to AIN7 (between 0 V and VDD)
• Internal references 1.2 V, 1.8V and 2.4V
• Three speed/power consumption modes: low-power, normal and high-speed
• Single-pin capacitive sensor support
• Event generation on output changes
• UP event on VIN- > VIN+
• DOWN event on VIN- < VIN+
• CROSS event on VIN+ and VIN- crossing
• READY event on core and internal reference (if used) ready
4.2.3 PDM - PULSE DENSITY MODULATION INTERFACE
The pulse density modulation (PDM) module enables input of pulse density modulated signals from external audio frontends,
for example, digital microphones. The PDM module generates the PDM clock and supports single-channel or dual-channel
(Left and Right) data input. Data is transferred directly to RAM buffers using EasyDMA.
Содержание ST150M
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