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9
JP1: LVDS VDD Select (5V / 3.3V)
JP1
VDD Setting
3.3V
5V
JP2: CF Connector master/Slave Setting
JP2
Setting
Function
Short/Closed
Master
Open Slave
JP3: Clear CMOS Setting
Use JP3 to clear the CMOS contents.
Note that the power connector
should be disconnected from the board before clearing CMOS.
JP3
Function
Normal (default)
Clear CMOS