GE Vivid S5 N, Руководство по обслуживанию

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GE
P
ART
N
UMBER
FN091065, R
EVISION
2 VS5 N
AND
VS6 N
S
ERVICE
M
ANUAL
5-24 Section 5-4 - Back End Processor
P R E L I M I N A R Y
Section 5-4 Back End Processor
(cont’d)
For reference, a list of abbreviations used in this section is provided in Table 5-10 "Abbreviations and
Definitions" on page 5-24 .
5-4-2 ETX SBC Central Processing Unit (CPU)
The ETX SBC Central Processing Unit (CPU), which is mounted on top of the ETX Base Board (see
5-4-3 "ETX Base Board" on page 5-25 ), controls and processes the internal Back End Processor
operations. In addition, the CPU supports the Front End via the PCI bus.
The CPU utilized in the Vivid™ S5 N and Vivid™ S6 N ultrasound unit is a Pentium -M, 1.4 GHz
Processor.
Table 5-10 Abbreviations and Definitions
Abbreviation Definition
BGA Ball Grid Array
CS Component Side
EMC Electro Magnetic Compatibility
FPGA Field Programmable Gate Array
HDD Hard disk drive
MTBF Mean Time Between Failures
PCI Peripheral Card Interconnect
PLD Programmable Logic Device
PIB Probe Interface Board
PMC Power Management Controller
PS Power Supply
PSB Probe Select Board