Handling and Installation 11
1.4 Connectors and Headers
There
is
one
internal
IDE
40
‐
pin
header,
one
PIM
site
consisting
of
two
64
‐
pin
connectors,
two
COM
ports,
one
CompactFlash
connector
and
two
Gigabit
Ethernet
ports
available
on
the
VMIACC
‐
7055/ACC
‐
7055RC.
The
J3,
J4
and
J5
connectors
are
standard
CompactPCI
backplane
connectors.
Jumpers
E5,
E6,
E7
and
E8
are
used
to
set
the
mode
for
the
COM
ports.
Jumper
E4
is
used
to
configure
the
CompactFlash
for
master
or
slave
mode.
1.4.1 40-Pin IDE Header
When
an
IDE
drive
is
connected
to
P8
and
a
CompactFlash
is
loaded
on
the
P6
connector
,
one
of
them
must
be
set
as
a
slave.
See
for
instructions
on
how
to
set
the
CompactFlash
as
a
master/slave.
NOTE
An 80-conductor cable is required for IDE interfaces above Ultra ATA/66.
Figure 1-5 P8 40-pin IDE Header (Internal)
Table 1-1 40-pin IDE Header Pinout
Pin
Signal
Pin
Signal
1
IDES_RESET#
2
GND
3
IDES_ D[7]
4
IDES_D[8]
5
IDES_ D[6]
6
IDES_D[9]
7
IDES_D[5]
8
IDES_D[10]
9
IDES_D[4]
10
IDES_D[11]
11
IDES_D[3]
12
IDES_D[12]
13
IDES_D[2]
14
IDES_D[13]
15
IDES_D[1]
16
IDES_D[14]
17
IDES_D[0]
18
IDES_D[15]
19
GND
20
Key
21
IDES_DMARQ
22
GND
23
IDES_DIOW#
24
GND
25
IDES_DIOR#
26
GND
27
IDES_IORDY
28
GND
29
IDES_DMACK#
30
GND
31
IDES_INTRQ
32
5V
33
IDES_DA1
34
IDES_CBLIO#
35
IDES_DA0
36
IDES_DA2
37
IDES_CS1#
38
IDES_CS3#
39
HD_ACTA#
40 GND
Pin 2
Pin 40
Pin 1
Pin 39
