Gage CompuScope 85GC, Руководство по аппаратному обеспечению и инструкция по установке драйверов

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CompuScope 85GC memory organization 25
Memory organization on CompuScope 85GC
FISO memory architecture
CompuScope 85GC uses a very unique memory system that uses on-chip analog memory cells that can store the
instantaneous value of the input voltage at a particular time.
By using 10,000 such cells for each of the input channels, CompuScope 85GC can offer acquisition depth of
10,000 points per channel.
This “analog storage data” is then converted to digital codes using a very accurate, but slower speed A/D
converter to yield very fast sampling speed at an unprecedented price.
Hence the name, F ast I n S low O ut.
On-board error correction and calibration
Not surprisingly, the analog memory cells on the CompuScope 85GC are not absolutely accurate from one
device to another. As such, it is necessary for each CompuScope 85GC to be calibrated.
All error correction and calibration is performed by very powerful signal processors, including custom ASICs,
on-board the CompuScope 85GC.
Interface to the CompactPCI
TM
bus
In order to allow optimum data transfer rates from the CompuScope 85GC acquisition memory to the PC
memory, the on-board circuitry uses DMA to move the data from the memory of the on-board calibration
processors into PCI memory.
CompactPCI
TM
Plug-n-Play BIOS is fully supported by CompuScope 85GC, making it unnecessary for the user
to worry about setting any jumpers or switches to configure the CS85GC.
A/D data storage
FISO memories are configured as circular buffers. A circular buffer is used to guarantee that the system will keep
on capturing data indefinitely until a trigger event is detected.
The sequence of events is as follows:
•
CompactPCI
TM
bus tells the CompuScope to start_capture using a register bit.
•
BUSY flag is set by the CompuScope. CompactPCI
TM
bus is denied any further access to the on-board
memory.
•
The on-board FISO memory counters initialize to ZERO and start counting up, thereby starting data storage
at memory address ZERO.
•
The system waits for a trigger event to occur while it is storing data in the on-board memory. This data is
called Pre-Trigger data.
•
Once the trigger event is received, a specified number of Post-Trigger points are captured. The number of
Post-Trigger Points can be specified by writing to a register on the CompuScope.
•
After storing the specified number of Post-Trigger Points subsequent to receiving the trigger event,
acquisition is stopped, BUSY flag is reset and PC bus is allowed access to the on-board memory.