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WG-7302
Page
23
Document Details
WG-7302 User’s Guide
Notes
: Windows API will be available to operate the BKLTCTL signal. Some Inverters have a limited voltage range
0- 2.5V for this signal: If voltage is > 2.5V the Inverter might latch up. Some Inverters generates noise on the
BKLTCTL signal, causing the LVDS transmission to fail (corrupted picture on the display). By adding a 1Kohm
resistor in series with this signal, mounted at the Inverter end of the cable kit, the noise is limited and the picture is
stable.
Available cable kit:
LVDS Cable
Notes
:
The pin1 voltage of this LVDS interface can be adjusted by PWR_LVDS.
PWR_LVDS
Description
pin1-2
pin2-3
X
Pin1 of LVDS connector(J8) is DC IN.
X
Pin1 of LVDS connector(J8) is 5V.
Warning: Short connected to the 1-2 pin, the 1 pin voltage of the LVDS connector is equal to the main board
input voltage.
7.5 Analog Connector (VGA)
The analog monitor interface is available through the VGA connector.
Function
Signal
PIN
Signal
Function
Red video signal
RED
1
2
VSYNC
Vertical sync
Ground
GND
3
4
GND
Ground
Greed video signal
GREEN
5
6
HSYNC
Horizontal sync
Ground
GND
7
8
GND
Ground
Blue video signal
BLUE
9
10
CLOCK
DDC clock
Ground
GND
11
12
DATA
DDC data
5V Power
+5V
13
14
GND
Ground
Available cable kit:
VGA
Cable