GF-8801, GF-8802, GF-8803
Hardware Specifications
SE19-410-006-00
10
5 Time to FINE LOCK
This product transitions to FINE LOCK for GPS time within 5 minutes from power on. However, the conditions
are constant temperature and open sky. Otherwise, the time to FINE LOCK may be extended.
6 Phase Relation between PPS and VCLK
Figure 6-1 shows the phase relation between PPS and VCLK. This relation is coherent.
PPS
VCLK
T
PPS
（
R
）
_VCLK(R)
T
PPS
（
F
）
_VCLK(R)
Figure 6-1. Phase relation between PPS and VCLK
Table 6-1. Phase relation between PPS and VCLK
Symbol
Description
Min
Max
Note
T
PPS(R)_VCLK(R)
VCLK rising delay time from PPS rising
35 nsec
55 nsec
[*1]
T
PPS(F)_VCLK(R)
VCLK rising delay time from PPS falling
35 nsec
55 nsec
[*1]
[*1] The frequency mode is PULL-IN, COARSE LOCK or FINE LOCK.