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4. ADJUSTMENTS
4-10
Self test ([GENERAL])
4.3.2
Suppressing interference
Input
Up to two interfering equipment can be connected to the interference rejection circuit
in the transceiver unit via EX KP IN 1 or EX KP IN 2 port. This circuit receives the key-
ing pulse (KP) from the interfering equipment to reject interference.
Interference rejection circuit
Check of keying pulse
The following keying pulse is required from the interfering equipment. If the level is out
of the ratings or KP output circuit is not provided, take the measures shown on the next
two pages to prevent equipment malfunction.
CI-68
CI-6888
VOL. 6651201-XX.XX
MEM.
1 2 3 OK
SIO. OK
CI-6810
VOL. 6651202-XX.XX
TBL.
MEM.
1 2 3 4 5 6 7 8 OK
ANA.
12V;12.03V BV;110.0V
TRM. +25.02
deg.
DSW. 00 00 00 01
DSW.
-- 00 00 01
XX: Program Version No.
NL -5, -6, -7
TVG ON
OFF
Noise Level
(Beam1,
Beam2, Beam3
in that order)
BEAM3
(PORT)
BEAM1
(BOW)
BEAM2
(STBD)
Echo status for three beams
PRESS [MENU] KEY TO QUIT.
H
C
TP2
TB-4
KP IN1
KP IN2
9
16
CR14
[EKP1]
H
C
TP4
CR15
S1
[EKP2]
11
12
PCN (66P3924)
Photo
Coupler
Photo
Coupler
Flip Flop
Circuit
Содержание CI-68
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