9-4
A0C76BLD
Digital Signal Process Block Diagram
DIGIT
AL MAIN CB
A UNIT
IC3301
(DIGIT
AL SIGNAL PR
OCESS)
VIDEO-OUT
DIGIT
A
L
SIGNAL
PR
OCESS
D-SUB
3
12
15
1
2
RED
GREEN
BLUE
DA
T
A
CLOCK
JK3701
L2
P2
J2
A/D
CONVER
TER
T1
14
13
HSYNC
VSYNC
U1
U2
AG
8
AK5
V1
V2
AE1
AA2
AC
3
AD1
AB4
AD4
AC
4
AD2
AC
1
AB1
AA3
W1
E7
VIDEO-R
VIDEO-G
VIDEO-B
T
O
VIDEO
BLOCK
DIA
GRAM
T
O
VIDEO
BLOCK
DIA
GRAM
T
O
VIDEO
BLOCK
DIA
GRAM
TO
A
U
D
IO
BLOCK
DIA
GRAM
SW
L3
M2
R1
K1
VIDEO-IN
J3
N3
RGB-VIDEO-IN
N2
DIF-OUT2
DIF-OUT1
IF-A
GC
T2
TU-CVBS
AA1
P3
H-SYNC
V
-SYNC
VG
A
-S
D
A
V
G
A-SCL
IF-A
GC
HDMI-IN2
HDMI-IN1
JK3703
TMDS-D0(+)
TMDS-D0(-)
TMDS-D1(+)
TMDS-D1(-)
TMDS-D2(+)
TMDS-D2(-)
SD
A
SCL
7
9
4
6
1
3
10
12
16
15
7
9
4
6
1
3
10
12
16
15
JK3704
TMDS-D0(+)
TMDS-D0(-)
TMDS-D1(+)
TMDS-D1(-)
TMDS-D2(+)
TMDS-D2(-)
TMDS-CLOCK(+)
TMDS-CLOCK(-)
SD
A
SCL
F2
F1
G2
G1
H2
H1
E2
E1
AG
10
AJ8
B1
B2
C1
C2
D1
D2
A1
A2
AF10
AE11
TMDS-CLOCK(+)
TMDS-CLOCK(-)
DEMODULA
T
O
R
/MPEG DECODER
DEMODU
.
ADC
DA
C
A
U
DIO I/F
RDQ(0-31)
MRA(0-12)
IC3201,
IC3202
(DDR2 SDRAM)
HDMI I/F
AU
D
IO
DECODER
VIDEO
DECODER
VIDEO SIGNAL
A
U
DIO SIGNAL
CN3401
CI CARD SLO
T
DA
C
SIF(+)
SPDIF
AB2
LCD MODUL
E
ASSEMBL
Y
CN3901
LL
V1(-)
21
LL
V1(+)
20
LL
V0(-)
23
LL
V0(+)
22
LL
V2(-)
19
LL
V2(+)
18
LL
V3(-)
13
LL
V3(+)
12
LL
V4(-)
11
LL
V4(+)
10
LL
V5(-)
9
LL
V5(+)
8
LL
VCLK(+)
16
LL
VCLK(-)
15
TP
6
POL
5
CPV
4
OE1
3
STV
1
TIMING
CONTR
OL
LV
D
S
OUTPUT
AK23
AJ23
AK22
AJ22
AK21
AJ21
AK20
AJ20
AK19
AJ19
AH18
AH19
AJ24
AK24
AG
23
AH23
AH25
AK26
AH26
D
A
T
A
(0-31)
ADDESS(0-12)
GD
A
T
(0-15)
GADR(0-14)
COM-VIDEO-Y
-IN
COM-VIDEO-Pb-IN
COM-VIDEO-Pr-IN
HEADPHONE(L)
COM-A
UDIO(L)
PC-A
UDIO(L)
PC-A
UDIO(R)
RGB-A
UDIO(L)-OUT
RGB-A
UDIO(R)-OUT
RGB-A
UDIO(L)-IN
RGB-A
UDIO(R)-IN
COM-A
UDIO(R)
HEADPHONE(R)
