Fujitsu MB90390 Series, Руководство по оборудованию

Страница: 63 / 740

35
CHAPTER 2 CPU
2.6 Multi-byte Data in Memory Space
Data is written to memory from the low-order addresses. Therefore, for a 32-bit data
item, the low-order 16 bits are transferred before the high-order 16 bits.
If a reset signal is input immediately after the low-order bits are written, the high-order
bits might not be written.
■
Multi-byte Data Allocation in Memory Space
Figure 2.6-1 is a diagram of multi-byte data configuration in memory. The low-order eight bits of a data
item are stored at address n, then address n+1, address n+2, address n+3, etc.
Figure 2.6-1 Sample Allocation of Multi-byte Data in Memory
■
Accessing Multi-byte Data
Fundamentally, accesses are made within a bank. For an instruction accessing a multi-byte data item,
address "FFFF
H
" is followed by address "0000
H
" of the same bank. Figure 2.6-2 shows an execution of
MOVW A, 080FFFFH.
Figure 2.6-2 Execution of MOVW A, 080FFFFH
"H"
"L"
01010101
11001100
11111111
00010100
MSB LSB
01010101
B
11001100
B
11111111
B
00010100
B
Address n
"L"
"H"
80FFFF H
800000 H
01H
23 H
?? ??
23 H 01H
AL before execution
AL after execution
·
·
·