Fujitsu 50FH5037E-02, Руководство OEM

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(b) Image control register #1
#1
a a a a a a
a a a a a a
a a a a a a
a a a a a a
7
0
a a a a a a
a a a a a a
a a a a a a
a a a a a a
6
a a a a a a a
a a a a a a a
a a a a a a a
a a a a a a a
5
a a a a a a
a a a a a a
a a a a a a
a a a a a a
4
a a a a a a
a a a a a a
a a a a a a
a a a a a a
3
a a a a a a
a a a a a a
a a a a a a
a a a a a a
2
a a a a a a
a a a a a a
a a a a a a
a a a a a a
1
a a a a a a a
a a a a a a a
a a a a a a a
a a a a a a a
0
0
LSB
Automatic separation specification (*1)
0¥: Based on the operator panel
specification (*3)
1 0: Automatic separation is not done.
1 1: Automatic separation
Conversion mode specification
0¥¥: No operation
1 0 0:
Not provided with white/black
conversion.
Not provided with right/left
conversion.
1 0 1: Not provided with white/black
conversion.
Provided with right/left conversion.
1 1 0: Provided with white/black conversion.
Not provided with right/left
conversion.
1 1 1: Provided with white/black conversion.
Provided with right/left conversion.
Subwindow specification (*2)
0 : Subwindow invalid
1 : Subwindow valid
Note:
Image control registers #1 to #3 must be sent in one sequence. One of
automatic separation, image emphasis, outline extract, overlay can be specified.
*1 Halftone specification (control register #2) is invalid in the automatic
separation mode. However halftone processing (dither or error diffusion) for
photo area follows control register #19, and the dither pattern follows
control register #2.
*2 The subwindow control register is valid when the subwindow is valid.
*3 When automatic separation specification is based on operator panel, the bit
7 of image control register #2 and the bit 3 of image control register #3
must be set to ©0π.
X©00π is set when the power is turned on or when the initial state is specified by the
CLEAR command.
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