System Integration Unit (SIU)
MPC5565 Microcontroller Reference Manual, Rev. 1.0
Freescale Semiconductor
6-117
A block diagram of the internal multiplexing feature is shown in
multiplexing of four external signals to an SIU output. A 2-bit SEL field from an SIU select register defines
the input to the multiplexor.
Figure 6-159. Four-to-One Internal Multiplexing Block Diagram
6.4.5.1
eQADC External Trigger Input Multiplexing
The six eQADC external trigger inputs can be connected to one of the following pins:
•
External pin
•
eTPU channel
•
eMIOS channel
The input source for each eQADC external trigger is configured in the eQADC trigger input select register
(SIU_ETISR). As shown in the figure, the ETRIG[0] input of the eQADC can be connected to either the
ETRIG[0]_GPIO[111] pin, the ETPUA[30] channel, the EMIOS[10] channel, or the GPIO[206] pin. The
remaining ETRIG inputs are multiplexed in the same manner . If an ETRIG input is connected to an eTPU
or eMIOS channel, the external pin used by that channel can be used by the alternate function on that pin.
An example of the multiplexing of an eQADC external trigger input is given in
.
Figure 6-160. eQADC External Trigger Input Multiplexing
SIU_ETISR, SIU_EIISR, and SIU_DISR
To chip-level signal
external to the SIU
From chip-level signals
external to the SIU
SIU
SIU_ETISR[TSEL0]
ETRIG[0]
GPIO[206]
ETRIG[0]_GPIO[111]
ETPUA[30] output channel
EMIOS[10] output channel
Содержание MPC5565
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