Freescale Semiconductor MPC5553, Справочное руководство

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MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 9-39
Figure 9-26 lists the memory array terms and how the TCD settings interrelate.
Figure 9-26. Memory Array Terms
9.5.2 DMA Programming Errors
The eDMA performs various tests on the transfer control descriptor to verify consistency in the descriptor
data. Most programming errors are reported on a per channel basis with the exception of two errors: group
priority error and channel priority error, or EDMA_ESR[GPE] and EDMA_ESR[CPE], respectively.
For all error types other than group or channel priority errors, the channel number causing the error is
recorded in the EDMA_ESR. If the error source is not removed before the next activation of the problem
channel, the error will be detected and recorded again.
Channel priority errors are identified within a group after that group has been selected as the active group.
For the example below, all of the channel priorities in group 1 are unique, but some of the channel priorities
in group 0 are the same:
1. The eDMA is configured for fixed group and fixed channel arbitration modes.
2. Group 1 is the highest priority and all channels are unique in that group.
3. Group 0 is the next highest priority and has two channels with the same priority level.
4. If group 1 has any service requests, those requests will be executed.
5. After all of group 1 requests have completed, group 0 will be the next active group.
6. If Group 0 has a service request, then an undefined channel in group 0 will be selected and a
channel priority error will occur.
7. This will repeat until the all of group 0 requests have been removed or a higher priority group 1
request comes in.
In this sequence, for item 2, the eDMA acknowledge lines will assert only if the selected channel is
requesting service via the eDMA peripheral request signal. If interrupts are enabled for all channels, the
user will receive an error interrupt, but the channel number for the EDMA_ER and the error interrupt
request line are undetermined because they reflect the ‘undefined’ channel. A group priority error is global
and any request in any group will cause a group priority error.
xADDR:
(Starting Address)
xSIZE:
(Size of one data
Minor Loop
(NBYTES in
Minor Loop, often
the same value
as xSIZE)
Offset (xOFF): Number of
bytes added to current
address after each transfer
(Often the same value
as xSIZE)
•
Minor Loop
Each DMA Source (S) and
Destination (D) has its own:
• Address (xADDR)
• Size (xSIZE)
• Offset (xOFF)
xLAST: Number of bytes
added to current address
Peripheral queues typically
have size and offset
equal to NBYTES
•
•
after Major Loop
(Typically used to
loop back)
transfer)
•
•
•
•
•
•
Last Minor Loop
• Modulo (xMOD)
• Last Address Adjustment
(xLAST) where x = S or D
•
•
•