Freescale Semiconductor KIT33908MBEVBE, Руководство пользователя

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Evaluation Board Hardware Description
KIT33908MBEVBE Evaluation Board User’s Guide , Rev. 1.0 3/2014
Freescale Semiconductor, Inc. 11
10.2 The Digital Section
All I/O ports from the MCU are accessible via the I/O ports implemented on the top of the Mother board. Pin
mapping of the ports with the IOs differs depending on the type of Daughter board being used. An example of
port mapping done for the MPC5643L is shown in the
Figure 7 .
Figure 7. MCU I/Os Mapping for Daughter Board MPC5643L
10.2.1 Ports A through H
Table 2. I/O Port Mapping (when the daughter board with MPC5643L is being used)
PORT D PORT H
PD1 PD3 PD5 PD7 PD9 PD11 PD13 PD15 V
CORE
PH1 PH3 PH5 PH7 PH9 PH11 PH13 PH15 V
CORE
PD0 PD2 PD4 PD6 PD8 PD10 PD12 PD14 GND PH0 PH2 PH4 PH6 PH8 PH10 PH12 PH14 GND
PORT C PORT G
PC1 PC3 PC5 PC7 PC9 PC11 PC13 PC15 V
CORE
PG1 PG3 PG5 PG7 PG9 PG11 PG13 PG15 V
CORE
PC0 PC2 PC4 PC6 PC8 PC10 PC12 PC14 GND PG0 PG2 PG4 PG6 PG8 PG10 PG12 PG14 GND
PORT B PORT F
PB1 PB3 PB5 PB7 PB9 PB11 PB13 PB15
V
CORE
PF1 PF3 PF5 PF7 PF9 PF11 PF13 PF15
V
CORE
PB0 PB2 PB4 PB6 PB8 PB10 PB12 PB14 GND PF0 PF2 PF4 PF6 PF8 PF10 PF12 PF14 GND
PORT A PORT E
PA1 PA3 PA5 PA7 PA9 PA11 PA13 PA15
V
CORE
PE1 PE3 PE5 PE7 PE9 PE11 PE13 PE15 V
CORE
PA0 PA2 PA4 PA6 PA8 PA10 PA12 PA14 GND PE0 PE2 PE4 PE6 PE8 PE10 PE12 PE14 GND
PORT A
PORT B
PORT C
PORT D
PORT F
PORT E
PORT G
PORT H
PORT I
PORT J
PORT K
PORT L
PORT M
PORT N
PORT P