D O C - 0 3 3 4 - 0 1 0 , R E V D
D E C E M B E R 2 , 2 0 0 5
11
Figure 3: JTAG / OnCE BDM Connection
TDI
1
2
GND
TDO
3
4
GND
TCK
5
6
GND
7
8
N/C (key)
/RESET
9
10
TMS
V
DD
11 12
/DE
13 14
/TRST
J1 Connector
Connector J1 provides access to CSM-56F801 I/O port signals. This connector may also be
used to power the module or to power off-module circuitry.
Figure 4: MCU I/O Connector
V
X
1
2
IREQA*
Default Signal Assignment
GND
3
4
RESET*
MCU Port
Signal
Disable
TxD0
5
6
RxD0
7
8
TxD0
COM1 TXD
CT-4
9
10
RxD0
COM1 RXD
CT-5
TD0
11 12
TD0
SW1
User1
TD1
13 14
TD1
SW2
User2
TD2
15 16
PWMA0
LED1
User3
MOSI
17 18
ANA0
PWMA1
LED2
User4
MISO
19 20
ANA1
SCLK
21 22
SS*
23 24
FAULTA0
25 26
Note: Default signal assignment
should be disabled to use the signal
at connector J1
27 28
ANA2
29 30
PWMA0
ANA3
31 32
PWMA1
ANA4
33 34
PWMA2
ANA5
35 36
PWMA3
ANA6
37 38
PWMA4
ANA7
39 40
PWMA5
Freescale Semiconductor, Inc.
