FLY E185
Service Manual
CKT Confidential
Page 8 of 47
Microcontroller Coprocessors: runs computing-intensive processes in place of the
Microcontroller;
DSP Peripherals: hardware accelerators for GSM/GPRS channel codec;
Multimedia Subsystem: integrates several advanced accelerators to support
multimedia applications;
Voice Front End: the data path for converting analog speech to and from digital
speech;
Audio Front End: the data path for converting stereo audio from an audio source;
Baseband Front End: the data path for converting a digital signal to and from an
analog signal from the RF modules;
Timing Generator: generates the control signals related to the TDMA frame timing;
Power, Reset and Clock Subsystem: manages the power, reset, and clock distribution
inside MT6236.
Bluetooth subsystem: includes an ARM7EJ-STMRISC processor with embedded
ROM/RAM system, baseband processor, and a high-performance radio block.
Power management unit: a self-contained power supply source which also controls
the charging and system startup circuitry.
3.2 Principle of RF circuit
3.2.1 GSM RF AD6548 application
The AD6548 receiver section fully integrates all RF and baseband signal processing, and it
includes Low Noise Amplifiers, Down-converting Mixers, Baseband Amplifiers/Low Pass Filters,
Baseband Output D.C offset Correction, Receive Local Oscillator (LO) Generator.
The transmit section of the AD6548 radio implements a translation loop modulator. This consists
of a quadrature modulator, high speed phase-frequency detector (PFD) with charge pump output,
loop filter, TX VCO and a feedback down converting mixer. The VCO output (divided by 2 for
low band) is fed to the power amplifier with a portion internally fed back into the
down-converting feedback mixer to close the feedback loop. It includes Quadrature Modulator,
Phase Frequency Detector (PFD), Loop filter, TX VCO, Feedback Down-converting Mixer, and
Transmit Frequency Plan.
The below figure show the GSM RF circuit:
