section 5.5.10.9 below. The following example causes the MSS bit in the Status
Byte Register to be set and a service request to be generated whenever the ESB
bit of the Status Byte Register is set.
Example command: *SRE 32
6.5.10.8
*SRE?
This query command returns the Service Request Enable Register (see Section
6.5.10.7 above).
Example command: *SRE?
Example response: 32
6.5.10.9
*STB?
This query command returns the Status Byte Register. Reading this register
does not affect it or the output queue. The value returned indicates the condi-
tion of each of the eight bits of the register by adding the binary-weighted val-
ues of each bit. The meaning of each bit, when set (1), is as follows where 0 is
the least significant and 7 is the most significant:
0
No function, always 0.
1
No function, always 0.
2
Error Bit (ERR). Indicates that an error message is in the error queue.
3
Questionable Status Bit (QSB). Indicates that a bit in the Questionable
Status Event Register is set and its corresponding mask bit in the Ques-
tionable Status Enable Register is set. It is cleared when the Questionable
Status Event Register is cleared (by reading it, Section 6.5.10.20).
4
Message Available (MAV). Indicates that data is present in the output
queue. (Applicable only for IEEE-488 service request and serial poll.)
5
Event Status Bit (ESB). Indicates that a bit in the Event Status Register is
set and its corresponding mask bit in the Event Status Enable Register is
set. It is cleared when the Event Status Register is cleared (by reading it,
Section 6.5.10.4).
6
Master Summary Status (MSS). Indicates that any other bit in the Status
Byte Register is set and its corresponding mask bit in the Service Re-
quest Enable Register is set (see Section 6.5.10.7).
7
Operation Status Bit. Indicates that a bit in the Operation Status Event
Register is set and its corresponding mask bit in the Operation Status En-
able Register is set. It is cleared when the Operation Status Event Regis-
ter is cleared (by reading it, Section 6.5.10.15).
The Status Byte Register can also be read from the IEEE-488 interface using
serial poll (see Section 14.4.5). The Status Byte Register can not be set or
cleared directly but always reflects the current state of the reported conditions.
The response in the following example would be given after an invalid com-
105
6 Digital Communications Interface
Commands
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