Input Under Voltage Lockout, UVLO
The product monitors the input voltage and will turn-on and
turn-off at configured levels. The default turn-on input voltage
level setting is 4.20 V, whereas the corresponding turn-off input
voltage level is 3.85 V. Hence, the default hysteresis between
turn-on and turn-off input voltage is 0.35 V. Once an input turn-
off condition occurs, the device can respond in a number of
ways as follows:
1. Continue operating without interruption. The unit will
continue to operate as long as the input voltage can be
supported. If the input voltage continues to fall, there will
come a point where the unit will cease to operate.
2. Continue operating for a given delay period, followed by
shutdown if the fault still exists. The device will remain in
shutdown until instructed to restart.
3. Initiate an immediate shutdown until the fault has been
cleared. The user can select a specific number of retry
attempts.
The default response from a turn-off is an immediate shutdown
of the device. The device will continuously check for the
presence of the fault condition. If the fault condition is no
longer present, the product will be re-enabled. The turn-on and
turn-off levels and response can be reconfigured using the
PMBus interface.
Remote Control
The product is equipped with a
remote control function, i.e., the
CTRL pin. The remote control
can be connected to either the
primary negative input
connection (GND) or an external
voltage (Vext), which is a 3 - 5 V
positive supply voltage in
accordance to the SMBus
Specification version 2.0.
The CTRL function allows the product to be turned on/off by an
external device like a semiconductor or mechanical switch. By
default the product will turn on when the CTRL pin is left open
and turn off when the CTRL pin is applied to GND. The CTRL
pin has an internal pull-up resistor. When the CTRL pin is left
open, the voltage generated on the CTRL pin is max 5.5 V.
If the device is to be synchronized to an external clock source,
the clock frequency must be stable prior to asserting the CTRL
pin.
The product can also be configured using the PMBus interface
to be “Always on”, or turn on/off can be performed with PMBus
commands.
Input and Output Impedance
The impedance of both the input source and the load will
interact with the impedance of the product. It is important that
the input source has low characteristic impedance. The
performance in some applications can be enhanced by
addition of external capacitance as described under External
Decoupling Capacitors. If the input voltage source contains
significant inductance, the addition a capacitor with low ESR at
the input of the product will ensure stable operation.
External Capacitors
Input capacitors:
The input ripple RMS current in a buck converter is equal to
Eq. 1.
D
D
I
I
load
inputRMS
1
,
where
load
I
is the output load current and
D
is the duty cycle.
The maximum load ripple current becomes
2
load
I
. The ripple
current is divided into three parts, i.e., currents in the input
source, external input capacitor, and internal input capacitor.
How the current is divided depends on the impedance of the
input source, ESR and capacitance values in the capacitors. A
minimum capacitance of 300 µF with low ESR is
recommended. The ripple current rating of the capacitors must
follow Eq. 1. For high-performance/transient applications or
wherever the input source performance is degraded, additional
low ESR ceramic type capacitors at the input is recommended.
The additional input low ESR capacitance above the minimum
level insures an optimized performance.
Output capacitors:
When powering loads with significant dynamic current
requirements, the voltage regulation at the point of load can be
improved by addition of decoupling capacitors at the load.
The most effective technique is to locate low ESR ceramic and
electrolytic capacitors as close to the load as possible, using
several capacitors in parallel to lower the effective ESR. The
ceramic capacitors will handle high-frequency dynamic load
changes while the electrolytic capacitors are used to handle
low frequency dynamic load changes. Ceramic capacitors will
also reduce high frequency noise at the load.
It is equally important to use low resistance and low inductance
PWB layouts and cabling.
External decoupling capacitors are a part of the control loop of
the product and may affect the stability margins.
Stable operation is guaranteed for the following total
capacitance
O
C
in the output decoupling capacitor bank where
Eq. 2.
0
3000
,
470
,
max
min
C
C
C
O
µF .
The decoupling capacitor bank should consist of capacitors
which has a capacitance value larger than
min
C
C
and has
an
ESR
range of
Eq. 3.
30
,
5
,
max
min
ESR
ESR
ESR
mΩ
The control loop stability margins are limited by the minimum
time constant
min
of the capacitors. Hence, the time constant
of the capacitors should follow Eq. 4.
Eq. 4.
s
35
.
2
min
min
min
ESR
C
This relation can be used if your preferred capacitors have
parameters outside the above stated ranges in Eq. 2 and Eq.3.
CTRL
GND
Vext
BMR4
6
series
PoL Regulators
Input 4.5-14 V, Output up to 50 A / 165 W
1/28701-BMR 464 Rev.B
July 2019
© Flex
Technical Specification
BMR4
6
series
PoL Regulators
Input
4.5-14
V, Output up to
50
A
/
165
W
1/28701-BMR 464 Rev.B
July 2019
©
Flex
Technical Specification
50