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reserved.
FIBOCOM SC138-
NA
Series Hardware Guide
33/88
Pin Name
Pin No.
I/O
Pin Description
Remarks
NC
2,8,9,14,37,124,125,127,151,159,166,167,169,192,193,194,
195,198,199,200,201,202,203,223,225,227,234,242,248,25
2
N
C
Hanging in the
air
Pins marked with "Boot configuration" do not allow hardware pull-up.
Use CPU GPIO first, not PM6125_GPIO until there is no CPU GPIO.
The configuration of SC138 module QUP interface is described in the following table:
Pin
Number
GPIO
QUP
Configuration
Function 1 Function 2 Function 3
Function 4
115
GPIO_0
QUP0
SE0
L0
UART_CTS
SPI_MISO
I2C_SDA
-
116
GPIO_1
L1
UART_RFR
SPI_MOSI
I2C_SCL
-
113
GPIO_2
L2
UART_TX
SPI_SCLK
-
-
114
GPIO_3
L3
UART_RX
SPI_CS_N
-
-
267
GPIO_4
QUP0
SE1
L0
-
-
I2C_SDA
-
268
GPIO_5
L1
-
-
I2C_SCL
-
150/158
GPIO_6
QUP0
SE2
L0
UART_CTS
SPI_MISO
I2C_SDA
-
41
GPIO_7
L1
UART_RFR
SPI_MOSI
I2C_SCL
-
209
GPIO_8
L2
UART_TX
SPI_SCLK
-
-
207
GPIO_9
L3
UART_RX
SPI_CS_N
-
-
90
GPIO_16
QUP0
SE4
L0/2 UART_TX
I2C_SDA
-
-
89
GPIO_17
L1/3 UART_RX
I2C_SCL
-
-
47
GPIO_22
QUP1
SE0
L0
UART_CTS
SPI_MISO
I2C_SDA
I3C_SDA
48
GPIO_23
L1
UART_RFR
SPI_MOSI
I2C_SCL
I3C_SCL
45
GPIO_24
L2
UART_TX
SPI_SCLK
-
-
46
GPIO_25
L3
UART_RX
SPI_CS_N
-
-
81
GPIO_26
L4
-
SPI_CS1
-
-
Note: