
Identification
Manual
ID ISC.MR102
FEIG ELECTRONIC GmbH
Page 69 of 153
H01113-4e-ID-B.docx
6.3.
[0x63] Software Reset
This protocol allows you to perform a reset of Reader CPU.
Host
Reader
1
2
3
4
5
6,7
STX
(0x02)
MSB
ALENGTH
LSB
ALENGTH
COM-ADR
[0x63]
CRC16
Host
Reader
1
2
3
4
5
6
7,8
STX
(0x02)
MSB
ALENGTH
LSB
ALENGTH
COM-ADR
[0x63]
STATUS
11
CRC16
Note:
The RF-
field will be switched off after a “CPU Reset”
The communication interface will not be reset.
6.4.
[0x64] System Reset
This protocol allows you to reset the RF Controller.
Host
Reader
1
2
3
4
5
6
7,8
STX
(0x02)
MSB
ALENGTH
LSB
ALENGTH
COM-ADR
[0x64]
Mode
CRC16
Host
Reader
1
2
3
4
5
6
7,8
STX
(0x02)
MSB
ALENGTH
LSB
ALENGTH
COM-ADR
[0x64]
STATUS
12
CRC16
MODE:
Defines the controller which will be reset.
MODE
Controller
0x00
RF Controller
Note:
The RF-
field will be switched off after a “CPU Reset”
The communication interface will be reset.
11
see ANNEX E: Index of Status Bytes
12