FEC FEB-9455, Руководство пользователя

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FEB-9455 User’s Manual 23
2.4 Advanced Chipset Features
Item Help
Menu Level
↑↓ ← →
:Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1: General Help
DRAM Timing Selectable
CAS Latency Time
DRAM RAS# to CAS# Delay
DRAM RAS# Precharge
Precharge delay (tRAS)
System Memory Frequency
System BIOS Cacheable
Video BIOS Cacheable
** VGA Setting **
PEG/Onchip VGA Control
On-Chip Frame Buffer Size
DVMT Mode
DVMT / Fixed Memory Size
Boot Display
Panel Number
Phoenix – AwardBIOS CMOS Setup Utility
Advanced Chipset Features
x
x
x
x
x
[ Auto ]
[ 8MB ]
[ DVMT ]
[ 128MB ]
[ Auto ]
[ 800x600-18 LVDS ]
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
[ By SPD ]
Auto
Auto
Auto
Auto
Auto
[ Enabled ]
[ Disabled ]
□
DRAM Timing Selectable
Select DRAM timing by SPD (Serial Presence Detect) or manual.
□
System BIOS Cacheable
Select Enabled to caching of the system BIOS at F0000h-FFFFFh, resulting in better
system performance. However, if any program is written to this memory area, the
system error may result.
□
Video BIOS Cacheable
Select Enabled to caching of the video BIOS at C0000h-F7FFFh, resulting in better
video performance. However, if any program is written to this memory area, the
system error may result.
□
PEG/Onchip VGA Control
Select VGA control by PEG (PCI-Express Graphic) or onboard chipset.