Chapter 2 Installation
NET-1821VD2N
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A39 PERp5 A40
PERn5 B39 GND B40
GND
A41 GND A42
GND B41
PETp6
B42
PETn6
A43 PERp6 A44
PERn6 B43 GND B44
GND
A45 GND A46
GND B45
PETp7
B46
PETn7
A47 PERp7 A48
PERn7 B47 GND B48
PRSNT2#B
A49 GND
B49 GND
The pin definitions for PCIE2 are as follows:
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
A1 PRSNT1# A2 +12V B1 +12V B2
+12V
A3 +12V A4 GND B3
BYPASS_LED3
B4
GND
A5 NORMAL_LED3
A6 BYPASS_LED4
B5
SMCLK
B6
SMDATA
A7 NORMAL_LED4
A8
TMS
B7
GND
B8
+3.3V
A9 +3.3V A10
+3.3V B9 CFG6
B10
3.3Vaux
A11 PWRGD/PERST#
A12
GND
B11
WAKE#
B12
WDT_OUT3_A
A13 A14
REFCLK- B13 GND B14
PETp0
A15 GND A16
PERp0
B15
PETn0
B16
GND
A17 PERn0 A18
GND B17
WDT_OUT3_B
B18
GND
A19 SIO_RSMRST- A20
GND
B19
PETp1
B20
PETn1
A21 PERp1 A22
PERn1 B21 GND B22
GND
A23 GND A24
GND B23
PETp2
B24
PETn2
A25 PERp2 A26
PERn2 B25 GND B26
GND
A27 GND A28
GND B27
PETp3
B28
PETn3
A29 PERp3 A30
PERn3 B29 GND B30
WDT_OUT4_A
A31 GND A32
5VSB B31
WDT_OUT4_B
B32
GND
A33 5VSB A34
GND B33 PETp4 B34
PETn4
A35 PERp4 A36
PERn4 B35 GND B36
GND
A37 GND A38
GND B37
PETp5
B38
PETn5
A39 PERp5 A40
PERn5 B39 GND B40
GND
A41 GND A42
GND B41
PETp6
B42
PETn6
A43 PERp6 A44
PERn6 B43 GND B44
GND
A45 GND A46
GND B45
PETp7
B46
PETn7
A47 PERp7 A48
PERn7 B47 GND B48
PRSNT2#B
A49 GND
B49 GND
