第三章 BIOS 功能介绍
EC5-1817LNAR
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PCI Express Configuration
Aptio Setup Utility – Copyright (C) 2010 American Megatrends, Inc.
Chipset
PCI Express Clock Gating [Enabled]
DMI Link ASPM Control [L0sL1]
DMI Link Extended Synch Control [Disabled]
Subtractive Decode [Disabled]
PCI Express Root Port 1
PCI Express Root Port 2
PCI Express Root Port 3
PCI Express Root Port 4
PCI Express Root Port 5
PCI Express Root Port 6
PCI Express Root Port 7
PCIE Port 8 is assigned to LAN
→←：Select Screen
↑↓：Select Item
Enter：Select
+/-：Change Opt
F1：General Help
F2：Previous Values
F3：Optimized Defaults
F4：Save
ESC：Exit
Version 1.28.1119. Copyright (C) 2010,American Megatrends, Inc.
1. PCI Express Clock Gating
Enable or disable PCI Express Clock Gating for each root port.
2. DMI Link ASPM Control
Enable/Disable the control of Active State Power Management on SA side
of the DMI Link.
3. DMI Link Extended Synch Control
The control of Extended Synch on SB side of the DMI Link.
4. Subtractive Decode
Enable or disable PCI Express Subtractive Decode.
