ETAS
Hardware Description
XETK-S31.0
-
User
Guide
21
4.7
JTAG Interface
Fig.
4
-
5
Equivalent Circuitry of the ECU JTAG Interface (ECU)
The ECU part of the JTAG XETK interface is depicted in Fig.
The XETK-S31.0 incorporates 22 Ohm series resistors for the TMS, TCK, TDI
and /TRST lines on the ECU interface. Hence, no additional termination resis
-
tors are required on the ECU for these signals.
4.8
Trigger Modes: Overview
The XETK-S31.0 supports the following trigger modes:
• Pinless triggering
• Timer triggering
The trigger mode "Pinless Triggering" uses the microcontroller’s internal Devel
-
opment Trigger Semaphore (DTS) for triggering. See also chapter “Pinless Trig
The trigger mode "Timer Triggering" uses four internal timers of the XETK for
triggering. See also chapter “Timer Triggering” on page
4.9
Pinless Triggering
4.9.1
Startup Handshake
The JTAG Data Communication (JDC) register is used to generate process the
XETK startup handshake. The ECU must ensure that all memory ECC initializa
-
tion has been completed prior to the start-up handshake.
For further information on ECC initialization, please refer to the microcontrol
-
ler's reference manual.
XETK
ETAM3
ETAM2
/TRST
TMS
/PORST
Ubatt
GND
CAL WAKEUP
(12V)
VDDPSTBY
(1,25V) (I/O)
TDO
/TRST
/WGDIS
TCK
TDI
TDO
GND
TMS
/PORST
VDDP
(Sense)
/RSTOUT
TCK
ESR0
1
2
9
10
VD
D
SR
A
M
TDI
1. XETK: supply
and
monitor
the voltage of the ED RAM
R
XE
TK
=
0
R
EC
U
=
0
2. ECU: supply
the voltage of the ED RAM
OR
permanent power supply
VDDPSTBY
sense (I)
2.XETK: monitor
the voltage of the ED RAM
Power supply of the ED RAM:
Option 1: provided by XETK
Option 2: provided by ECU
ECU
JDP
57xx
/WGDIS circuit