3. FUNCTIONAL DESCRIPTION
3. Functional Description
This chapter describes the modules and functions integrated in ESP01.
3.1 CPU and Internal Memory
ESP32-D0WD contains two low-power Xtensa
®
32-bit LX6 microprocessors. The internal memory includes:
•
448 kB of ROM for booting and core functions.
•
520 kB (8 kB RTC FAST Memory included) of on-chip SRAM for data and instruction.
–
8 kB of SRAM in RTC, which is called RTC FAST Memory and can be used for data storage; it is
accessed by the main CPU during RTC Boot from the Deep-sleep mode.
•
8 kB of SRAM in RTC, which is called RTC SLOW Memory and can be accessed by the co-processor during
the Deep-sleep mode.
•
1 kbit of eFuse, of which 256 bits are used for the system (MAC address and chip configuration) and the
remaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID.
3.2 External Flash and SRAM
ESP32 supports up to four 16-MB of external QSPI flash and SRAM with hardware encryption based on AES to
protect developers’ programs and data.
ESP32 can access the external QSPI flash and SRAM through high-speed caches.
•
Up to 16 MB of external flash are memory-mapped onto the CPU code space, supporting 8, 16 and 32-bit
access. Code execution is supported.
•
Up to 8 MB of external flash/SRAM are memory-mapped onto the CPU data space, supporting 8, 16 and
32-bit access. Data-read is supported on the flash and SRAM. Data-write is supported on the SRAM.
ESP01 integrates 4 MB of external SPI flash. The 4-MB SPI flash can be memory-mapped onto the CPU code
space, supporting 8, 16 and 32-bit access. Code execution is supported. The integrated SPI flash is connected
to GPIO6, GPIO7, GPIO8, GPIO9, GPIO10 and GPIO11. These six pins cannot be used as regular GPIO.
3.3 Crystal Oscillators
The ESP32 Wi-Fi firmware can only support 40 MHz crystal oscillator for now.
