!
Appendix A
!
5
5
4
4
3
3
2
2
1
1
D
D
C
C
B
B
A
A
Digital
MEMS
Option
CX
20
92
1
I2
S
Bl
oc
k:
CX
20
92
1
Co
mm
un
ic
at
io
n
Bl
oc
k:
No
t
e
:
For
ASR
designs,
the
GPIO
to
host
processor
connection
is
required.
For
VoIP
designs,
the
GPIO
to
host
connection
is
optional.
DS
P
RE
SE
T
:
IO
19
Co
de
c_
I
2
S
_
M
C
L
K
DS
P_
I2
C_
SD
A
:
IO
18
DS
P_
I2
C_
SC
L
:
IO
23
DS
P
GP
IO
DS
P_
I2
S_
BC
LK
:
IO
33
DS
P_
I2
S_
DO
:
IO
35
DS
P_
I2
S_
LR
CK
:
IO
32
MU
TE
_O
N_O
F
F
:
I
O
2
7
To
MCU;
From
MCU;
MIC
MUTE
LED
CX
20
92
1
Mi
c
Bl
oc
k:
An
al
og
M
ic
I
np
ut
:
No
t
e
:
If
the
mic
from
FFC
connector
is
analog
MEMS,
R277,R278,
R279,R280,
should
be
surface-mo
unted,
And
R53,R52,R6
7,R69,
should
be
NC.
MI
C
IN
PU
T
Op
ti
on
1
Op
ti
on
2
AE
C_
I2S
_
F
S
:
AE
C_
I2
S
_
D
A
T
A
:
AE
C_
I2
S
_
B
C
L
K
:
CX
_TX
D
CX
_RT
S
/DM
IC_C
LK
CX
_CT
S
/DM
IC_D
A
T
CX
_RX
D
CX
_I2
C_S
DA
CX
_GP
IO_1
CX
_RS
T
N
CX
_RS
T
N
CX
_I2
C_S
CL
CX
_I2
S
_TX
_DA
T
A
CX
_I2
C_S
CL
CX
_TX
D
CX
_I2
S
_TX
_CLK
CX
_I2
S
_TX
_L
RC
K
CX
_GP
IO_1
IO27
IO27
CX
_INP
UT
_INP
1
CX
_INP
UT
_INN
1
IO27
CX
_AN
A
_INP
1
CX
_AN
A
_INN
1
CX
_MICB
IA
S
1
CX
_INP
UT
_INP
2
CX
_INP
UT
_INN
2
IO27
CX
_AN
A
_INP
2
CX
_AN
A
_INN
2
CX
_MICB
IA
S
2
CX
_I2
S
_RX
_CLK
CX
_I2
S
_RX
_L
RC
K
CX
_I2
S
_RX
_DA
T
A
2
CX
_I2
S
_RX
_DA
T
A
3
CX
_I2
S
_TX
_L
RC
K
CX
_I2
S
_TX
_CLK
CX
_I2
S
_TX
_DA
T
A
CX
_AN
A
_INP
1
CX
_AN
A
_INN
1
CX
_AN
A
_INP
2
CX
_AN
A
_INN
2
CX
_MICB
IA
S
1
CX
_MICB
IA
S
2
IO27
CX
_I2
C_S
DA
CX
_GP
IO_1
CX
_MICB
IA
S
1
CX
_MICB
IA
S
2
E
xtFF
C_M
IC_INP
1
E
xtFF
C_M
IC_INN
1
E
xtFF
C_M
IC_INP
2
E
xtFF
C_M
IC_INN
2
E
xtFF
C_M
IC_INP
1
CX
_INP
UT
_INP
1
O
nBoard
_MIC_IN
P
1
A
ux
IN_MIC
_INP
1
CX
_INP
UT
_INN
1
O
nBoard
_MIC_IN
N1
A
ux
IN_MIC
_INN
1
E
xtFF
C_M
IC_INN
1
CX
_INP
UT
_INP
2
O
nBoard
_MIC_IN
P
2
A
ux
IN_MIC
_INP
2
E
xtFF
C_M
IC_INP
2
CX
_INP
UT
_INN
2
O
nBoard
_MIC_IN
N2
A
ux
IN_MIC
_INN
2
E
xtFF
C_M
IC_INN
2
O
nBoard
_MIC_IN
P
2
O
nBoard
_MIC_IN
N2
O
nBoard
_MIC_IN
P
1
O
nBoard
_MIC_IN
N1
A
ux
IN_MIC
_INN
1
A
ux
IN_MIC
_INP
1
A
ux
IN_MIC
_INN
2
A
ux
IN_MIC
_INP
2
CX
20
72
1_
B
CLK
CX
20
72
1_
LRC
LK
CX
20
72
1_
A
DC
DA
T
CX
20
72
1_
B
CLK
CX
20
72
1_
LRC
LK
CX
_I2
S
_RX
_DA
T
A
1
CX
20
72
1_
A
DC
DA
T
CX
_GN
D
CX
20
92
1_
3V3
CX
_GN
D
CX
20
92
1_
3V3
CX
20
92
1_
3V3
CX
20
92
1_
3V3
CX
_GN
D
CX
_GN
D
CX
_GN
D
CX
20
92
1_
3V3
CX
_GN
D
CX
_GN
D
CX
20
92
1_
3V3
DG
ND
CX
20
92
1_
3V3
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
20
92
1_
3V3
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_GN
D
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
CX
_MG
ND
V
DD
33
CX
20
92
1_
3V3
CX
_GN
D
CX
_GN
D
CX
_GN
D
CX
_GN
D
CX
_GN
D
IO19
2
IO18
2,3
,6
IO35
2
CX
_TX
D
6
IO23
2,3
,6
IO33
2
IO32
2
CX
_GP
IO_1
2
IO27
2,3
CX
_MICB
IA
S
1
3
CX
_MICB
IA
S
2
3
E
xtFF
C_M
IC_INP
1
3
E
xtFF
C_M
IC_INN
1
3
E
xtFF
C_M
IC_INP
2
3
E
xtFF
C_M
IC_INN
2
3
CX
20
72
1_
B
CLK
6
CX
20
72
1_
LRC
LK
6
CX
20
72
1_
A
DC
DA
T
6
Ti
tle
Size
Doc
umen
t
Numb
er
Re
v
Da
te
:
Sh
e
e
t
of
<05_
CX
20
92
1_
Int
er
fac
e>
1.3
ESP32-
LYR
ATD-SYN
A
C
5
6
F
rid
ay
, Augus
t 3
0,
20
19
Ti
tle
Size
Doc
umen
t
Numb
er
Re
v
Da
te
:
Sh
e
e
t
of
<05_
CX
20
92
1_
Int
er
fac
e>
1.3
ESP32-
LYR
ATD-SYN
A
C
5
6
F
rid
ay
, Augus
t 3
0,
20
19
Ti
tle
Size
Doc
umen
t
Numb
er
Re
v
Da
te
:
Sh
e
e
t
of
<05_
CX
20
92
1_
Int
er
fac
e>
1.3
ESP32-
LYR
ATD-SYN
A
C
5
6
F
rid
ay
, Augus
t 3
0,
20
19
I2
S
U19A
CX
20
92
1_
60
P
_EN
G
I2S
_TX_CLK
3
I2S
_TX_DATA_1
1
I2S
_TX_LRCK
2
I2S
_RX_CLK
22
I2S
_RX_DA
TA_1
23
I2S
_RX_LRCK
24
I2S
_RX_DA
TA_2
25
I2S
_RX_DA
TA_3
26
T
P
77
1
R69
1.1
K
(5
%)
R201
10
K
(5
%)
J1
6
CO
N3x1_
2P54
1
2
3
D29
LES
D8D
3.3
CA
T
5G(NC
)
T
P
34
1
T
P
26
1
R300
0R(5%)
R53
1.1
K
(5
%)
J4
CO
N2
1
1
2
2
C185
10
nF/50V(10
%)
D30
LES
D8D
3.3
CA
T
5G(NC
)
L1
7
39
nH(±2%)
J1
7
CO
N3x1_
2P54
1
2
3
L1
9
39
nH(±2%)
T
P
27
1
U20
W25Q32FV
S
S
IG
/C
S
1
DO
2
/W
P
3
GND
4
DI
5
CLK
6
/H
OLD
7
VCC
8
R206
33
R(5%)
C186
10
nF/50V(10
%)
D32
LES
D8D
3.3
CA
T
5G(NC
)
R279
0R(5%)(NC)
R191
10
K
(5
%)
R184
0R(5%)
T
P
28
1
R282
10
K
(5
%)
R197
1.8K(5%)(NC)
C190
10
pF/50V(5%)(NC
)
R204
0R(5%)
R194
10
K
(5
%)(NC
)
R203
0R(5%)
D33
LES
D8D
3.3
CA
T
5G(NC
)
L2
0
39
nH(±2%)
R299
0R(5%)
R284
0R(5%)
C50
10
nF/50V(10
%)
R207
33
R(5%)
C188
10
uF/16V(20
%)(NC
)
L1
8
39
nH(±2%)
R192
33
R(5%)
R52
1.1
K
(5
%)
R185
0R(5%)
R86
0R(5%)
J1
4
CO
N3x1_
2P54
1
2
3
D18
RE
D LE
D
R209
0R(5%)
C189
10
uF/16V(20
%)(NC
)
C52
10
nF/50V(10
%)
T
P
29
1
C53
10
pF/50V(5%)
Audio
Port
U19B
CX
20
92
1_
60
P
_EN
G
ANA_I
NP1
40
MI
CBI
AS2
32
MI
CBI
AS1
41
ANA_I
NN1
39
ANA_I
NP2
33
ANA_I
NN2
34
VREFN
36
VREFP
35
VREF
42
VSS_R
EF
37
C34
10
nF/50V(10
%)
Q7
LBS
S
13
8L
T
1G
T
P
30
1
R297 5.7
6K(1%)
R278
0R(5%)(NC)
C51
47
0p
F
/50
V
(1
0%)
R198
1.8K(5%)(NC)
R186
0R(5%)
C36
10
nF/50V(10
%)
R205
0R(5%)
T
P
31
1
C32
10
pF/50V(5%)
R277
0R(5%)(NC)
R208
0R(5%)
Q
11
LBS
S
13
8L
T
1G
R212
49
.9R(1%)
R199
0R(5%)
C54
33
pF/50V(±2pF)
C184
1u
F
/25
V
(1
0%)
T
P
32
1
R193
10
K
(5
%)(NC
)
R195
0R(5%)
C191
47
0p
F
/50
V
(1
0%)
C33
33
pF/50V(±2pF)
R187
0R(5%)
U23
T
S
3A4742
DC
N
IN
1
1
IN
2
6
COM
1
7
COM
2
4
VCC
2
GND
5
NC2
3
NC1
8
R296
10
K
(5
%)
R213
49
.9R(1%)
J1
5
CO
N3x1_
2P54
1
2
3
R200
0R(5%)
R202
10
0K(1%)
J5
CO
N2
1
1
2
2
C182
0.1
uF/16V(10
%)
T
P
25
1
R298
0R(5%)
U22
T
S
3A4742
DC
N
IN
1
1
IN
2
6
COM
1
7
COM
2
4
VCC
2
GND
5
NC2
3
NC1
8
T
P
38
1
R196
0R(5%)
R188
4.7
K
(5
%)
T
P
76
1
C48
10
pF/50V(5%)
J1
8
A
12
51
WR
-S-4P
1
1
2
2
3
3
4
4
C207
0.1
uF/16V(10
%)
R190
4.7
K
(5
%)
R210
49
.9R(1%)
C183
1u
F
/16
V
(1
0%)
I2C
Slave
SP
I
Mast
e
r
GP
I
O
UA
R
T
U19C
CX
20
92
1_
60
P
_EN
G
SPI
_MO
51
SPI
_MI
53
S_SDA
58
SPI
_CK
52
S_SCL
59
SPI
_SS0
54
TEST
57
TXD
14
RXD
15
CTS
16
RTS
17
GPI
O_1
18
GPI
O_2
19
RSTN
60
C187
1u
F
/25
V
(1
0%)
T
P
33
1
C37
10
pF/50V(5%)
C49
33
pF/50V(±2pF)
R189
4.7
K
(5
%)
T
P
39
1
C206
0.1
uF/16V(10
%)
R306
5.7
6K(1%)
C38
33
pF/50V(±2pF)
R67
1.1
K
(5
%)
R211
49
.9R(1%)
R280
0R(5%)(NC)
D34
G
RE
E
N LE
D
1
2
Espressif
!
/
!
15 17
2019.09
