Marconi OMS 1200
Technical Product Description
221 02-ZAP 701 25/1 Rev C 2006-08-04
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Chapter 6:
Synchronisation
6.1 Timing
Sources
Timing signals can be derived from the following sources:
•
External sources
– from PDH or SDH Tributary Cards, or via the dedicated
External 1 or 2 clock inputs on the Comms/Aux/Ancillary Card.
•
Line interfaces
•
Internal oscillator -
Freerun mode (default condition at commissioning).
A source may be nominated by including it in a timing sink priority table.
6.2 Synchronisation
Modes
The system can be configured to operate in Freerun or Single SETG Timing Modes.
Note:
The defaults stated in each subsequent section exist if the NE is declared
operative without configuring synchronisation.
6.2.1 Freerun
In Freerun mode, the system clock, external outputs and all SDH line/tributary outputs
are synchronised to the highly stable internal oscillator on the Core Card. Only
configuration options described in Sections 6.3, 6.10 and 6.12 have any effect in
Freerun mode.
Note:
Default: Freerun.
6.2.2 SETG
Timing
In SETG Mode the NE is capable of deriving timing, from a choice of inputs:
•
Incoming STM–N line interfaces.
•
Tributary ports: either STM–N, 140 Mbit/s, 34/45 Mbit/s or 2 Mbit/s.
•
Two external input timing signal ports.
The selection of timing sources is performed by using a priority table.
Single SETG clock mode is provided in accordance with ITU and ETSI specifications
where a single clock is selected to time the SETS clock within the SDH equipment. All
STM-n line and tributary outputs are then timed from this clock.
6.2.3 Holdover
This is a standby mode that comes into operation automatically if all input timing
sources fail, it is not operator initiated. The output frequency is held within close limits
to that set by the last used timing source.
