Page 8
S5U13T04P00C100 Evaluation Board User Manual
XA3A-G-001-00
Revision 1.0
Issue Date: 2013/03/15
Seiko Epson Corporation
4.1
J1 Panel Interface Connector
The panel interface pins of the S1D13T04 are connected through J2.
Table 4-1 J1 Panel Interface Connector
Connector
: J1
Manufacture : HIROSE FH12S-40S-0.5SH 40pin
Pin No.
Signal Name
Description
Pin No.
Signal Name
Description
1
CSB
EPD Chip Select
21
C15P
Charge Pump
Capacitor
2
BUSY
EPD BUSY
22
C14M
Charge Pump
Capacitor
3
ID
Set ID to 0
23
C14P
4
SCLK
Serial Clock
24
C13M
Charge Pump
Capacitor
5
SI
Serial data output
25
C13P
6
SO
Serial data input
26
C12M
Charge Pump
Capacitor
7
RESETB
EPD Reset
27
C12P
8
ADC_IN
N.C.
28
C11M
Charge Pump
Capacitor
9
VCL
EPD VCL Capacitor
29
C11P
10
C42P
Charge Pump
Capacitor
30
VCOM_DRIVER VCOM from Driver IC
11
C42M
31
VCC
+3.3V for analog
12
C41P
Charge Pump
Capacitor
32
VDD
+3.3V for digital
13
C41M
33
GND
Ground
14
C31P
Charge Pump
Capacitor
34
VGH
EPD VGH
15
C31M
35
VGL
EPD VGL
16
C21P
Charge Pump
Capacitor
36
VDH
EPD VDH
17
C21M
37
VDL
EPD VDL
18
C16P
Charge Pump
Capacitor
38
BORDER
EPD BORDER
19
C16M
39
VST
EPD VST
20
C15M
Charge Pump
Capacitor
40
VCOM_PANEL
EPD VCOM
4.2
J2 Power Connector
Power for the S5U13T04P00C100 Evaluation Board is supplied through J2.
Table 4-2 J2 Panel Interface Connector
Pin No.
Signal Name
Description
1
VCC
Power 3.0V
2
GND
Ground