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CPU Interface
12
Seiko Epson Corporation
S5U13A04B00C Rev 1.0 Evaluation Board
Rev. 3.1
4 CPU Interface
4.1 CPU Interface Pin Mapping
Note
1
A0 for these busses is not used internally by the S1D13A04 and should be connected
to V
SS
.
2
If the target MC68K bus is 32-bit, then these signals should be connected to D[31:16].
3
These pins are not used in their corresponding host interface mode. Systems are
responsible for externally connecting them to Host Interface IO V
DD
.
Table 4-1: CPU Interface Pin Mapping
S1D13A04 Pin Name
Generic #1 Generic #2
Hitachi
SH-3 /SH-4
Motorola
MC68K #1
Motorola
MC68K #2
Motorola
REDCAP2
Motorola
MC68EZ328/
MC68VZ328
DragonBall
AB[17:1]
A[17:1]
A[17:1]
A[17:1]
A[17:1]
A[17:1]
A[17:1]
A[17:1]
AB0
A0
1
A0
A0
1
LDS#
A0
A0
1
A0
1
DB[15:0]
D[15:0]
D[15:0]
D[15:0]
D[15:0]
D[15:0]
2
D[15:0]
D[15:0]
CS#
External Decode
CSn#
External Decode
CSn
CSX
M/R#
External Decode
CLKI
BUSCLK
BUSCLK
CKIO
CLK
CLK
CLK
CLK
BS#
Connected to HIOV
DD
3
BS#
AS#
AS#
Connected to HIOV
DD
3
RD/WR#
RD1#
Connected
to HIOV
DD
3
RD/WR#
R/W#
R/W#
R/W
Connected to
HIOV
DD
3
RD#
RD0#
RD#
RD#
Connected
to HIOV
DD
3
SIZ1
OE
OE
WE0#
WE0#
WE#
WE0#
Connected
to HIOV
DD
3
SIZ0
EB1
LWE
WE1#
WE1#
BHE#
WE1#
UDS#
DS#
EB0
UWE
WAIT#
WAIT#
WAIT#
WAIT#/
RDY#
DTACK#
DSACK1#
N/A
DTACK
RESET#
RESET#
RESET#
RESET#
RESET#
RESET#
RESET_OUT
RESET