6. Appendix
S1R72V18 Evaluation Board Manual
EPSON 7
(Rev.1.01)
6.2
Connection Example 2 (USB I/F connection example)
Refer to the separate
S1R72V Series USB 2.0 Hi-Speed PCB Design Guidelines
.
6.3 Mounting
Diagram
The diagram below shows the factory default configuration.
JP2 1
3
CN4
EP1
SEIKO EPSON CORP.
S1R72V18 EVA QFP RoHS
1-2:IOVDD +3.3V
2-3:IOVDD +1.8V
IOVDD SELECT
1
4
CN3
CN2
IC1
CN
1
+5V OUT
JP1
1
3
JP8
JP7
JP9
JP11 JP12
EP0
JP6
JP5
JP10
JP15
JP4
JP13
JP14
PORT0
PORT1
LED1
LED2
LED3
POWER
USB0
USB1
OUT
IN
OUT
IN
GND
5.0V
GND
5.0V
CN5
Содержание S1R72V18
Страница 1: ...Rev 1 01 S1R72V18 Evaluation Board Manual ...
Страница 3: ...Scope This document applies to the S1R72V18 USB 2 0 device host controller LSI ...
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