Epson 6200A, Руководство центрального процессора, Страница: 55 / 97

Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB LSB
MSB LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
S1C6200/6200A CORE CPU MANUAL
EPSON
49
3 INSTRUCTION SET
LDPX MX,i
Load immediate data i into MX, increment X by 1
LDPX MX,i
M(X)
←
i
3
to i
0
, X
←
X + 1
1 1 1 0 0 1 1 0 i
3
i
2
i
1
i
0
E60H to E6FH
IV
5
Not affected
Not affected
Not affected
Not affected
Loads immediate data i into the data memory location addressed by IX. X is
incremented by 1. Incrementing X does not affect the flags.
LDPX MX,7 LDPX MX,0AH
X register 1000 0011 1000 0100 1000 0101
Memory (83H) 0010 0111 0111
Memory (84H) 1001 1001 1010
LDPX r,q
Load q-register into r-register, increment X by 1
LDPX r,q
r
←
q, X
←
X + 1
1 1 1 0 1 1 1 0 r
1
r
0
q
1
q
0
EE0H to EEFH
IV
5
Not affected
Not affected
Not affected
Not affected
Loads the contents of the q-register into the r-register. X is incremented by 1.
Incrementing X does not affect the flags.
LDPX A,B LDPX B,MY
X register 0100 1001 0100 1010 0100 1011
A register 1010 1101 1101
B register 1101 1101 0000
Memory (MY) 0000 0000 0000