EPOX EP-MVP3G-M, Руководство пользователя, Страница: 17 / 54

Installation EP-MVP3G-M/2/5
Page 3-5
Section 3-2
System Memory Configuration
Memory Layout
The EP-MVP3G-M/2/5 supports (3) 168-pin DIMMs (Dual In-line Memory
Module). The DIMMs can be either EDO (Extended Data Out) or SDRAM
(Synchronized DRAM). The DIMMs may be installed using just one chip.
• DIMM SDRAM may be 83MHz (12ns), 100MHz (10ns) or 125MHz
(8ns) bus speed.
• If you use both 50ns and 60ns memory you must configure your BIOS
to read 60ns.
• When using Synchronous DRAM we recommend using the 4 clock
variety over the 2 clock.
Figure 2 and Table 1 show several possible memory configurations using both
SIMM and DIMM.
* SDRAM only supports 8, 16, 32, 64, 128MB DIMM modules.
* We recommend to use PC100 Memory Module for bus speed between
66MHz and 100MHz.
* Using non-compliant memory with higher bus speed (over clocking) may
severely compromise the integrity of the system.
y r o m e M l a t o T
1 M M I D
) 1 / 0 k n a B (
2 M M I D
) 3 / 2 k n a B (
3 M M I D
) 5 / 4 k n a B (
B M 8 2 1 =
m u m i x a M
* M A R D S / O D E
, B M 2 3 , B M 6 1 , B M 8
1 X B M 8 2 1 , B M 4 6
e n o N e n o N
B M 6 5 2 =
m u m i x a M
* M A R D S / O D E
, B M 2 3 , B M 6 1 , B M 8
1 X B M 8 2 1 , B M 4 6
* M A R D S / O D E
, B M 2 3 , B M 6 1 , B M 8
, B M 4 6
1 X B M 8 2 1
e n o N
B M 4 8 3 =
m u m i x a M
* M A R D S / O D E
, B M 2 3 , B M 6 1 , B M 8
1 X B M 8 2 1 , B M 4 6
* M A R D S / O D E
, B M 2 3 , B M 6 1 , B M 8
1 X B M 8 2 1 , B M 4 6
* M A R D S / O D E
, B M 2 3 , B M 6 1 , B M 8
1 X B M 8 2 1 , B M 4 6
Table 1
DIMM 1
DIMM 2
B a n k 0 /1
B a n k 2 /3
DIMM 3
B a n k 4 /5
-S y n c h ro n o u s
-E D O
Figure 2