EPOX An Intel Socket 478 Processor Based Mainboard (400/533MHz), Руководство пользователя, Страница: 8 / 96

Introduction
Page 1-2
System Overview
This board is designed with Intel
®
845PE chipset. The Intel
®
845PE chipset includes
MCH(FW82845PE), ICH4(FW82801DB) and FWH three chips. The Intel
®
845PE
chipset is designed for Intel’s FC-PGA2 socket 478 package architecture and
support the 4X capability of the AGP 2.0 Interface Specification. A new chipset
component interconnect, the hub interface, is designed into the Intel
®
845PE chipset
to provide more efficient communication between chipset components.
Support of AGP 4X, 266/333MHz DDR SDRAM and the hub interface provides a
balanced system architecture for the Pentium
®
4 in the Socket 478 architecture
processor minimizing bottlenecks and increasing system performance. By
increasing memory bandwidth to 2.128GB/s through the use of AGP 4X, the
Intel
®
845PE chipset will deliver the data throughput necessary to take advantage
of the high performance provided by the powerful Pentium
®
4 in the Socket 478
architecture processor.
The Intel
®
845PE chipset architecture removes the requirement for the ISA
expansion bus that was traditionally integrated into the I/O subsystem of Intel
chipsets. This removes many of the conflicts experienced when installing
hardware and drivers into legacy ISA systems. The elimination of ISA will provide
true plug-and play for the Intel
®
845PE platform.
Intel
®
845PE chipset contains three core components: the Memory Controller
Hub (MCH), the I/O Controller Hub (ICH4) and the Firmware Hub (FWH). The
MCH integrates the data transfer rate of 400/533MHz, Pentium
®
4 processor bus
controller, AGP 2.0 controller, 266/333MHz DDR SDRAM controller and a high-
speed hub interface for communication with the ICH4. The ICH4 integrates an Ultra
ATA/66/100 controller, USB host controller, LPC interface controller, FWH interface
controller, PCI interface controller, and a hub interface for communication with the
MCH. The Intel
®
845PE chipset will provide the data buffering and interface
arbitration required to ensure that system interfaces operate efficiently and provide
the system bandwidth necessary to obtain peak performance the Pentium
®
4 in the
Socket 478 architecture.