EndRun TDC3303, Руководство пользователя

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T D C 3 3 0 3 U s e r M a n u a l 2
C H A P T E R O N E
3 T D C 3 3 0 3 U s e r M a n u a l
Free FLASH Upgrades
Firmware is stored in non-volatile FLASH memory, so the TDC3303 can be easily upgraded in the
field using the local RS-232 port. We make all firmware upgrades for our products available to our
customers free of charge.
Theory of Operation
Overview
The diagram below illustrates the TDC3303 architecture. Single or dual power supply operation is
supported with any combination of AC or DC input voltages. (Installation of a second power supply
is an option for the TDC3303.) The presence of proper voltage at the output of each of the two inter-
nal DC-DC converters is detected and monitored by the alarm logic and CPU. The outputs of these
two power supplies are diode “OR’d” to power the TDC3303. When both power supplies are good,
Power Supply A is active while Power Supply B remains on standby.
Single or dual signal inputs are detected and monitored by the alarm logic and CPU. In addition,
single or dual TTL level disable inputs are monitored to allow switching based on the alarm output
from the upstream signal source. This external alarm signal can be connected to rear-panel BNC
connectors labeled “DISABLE IN”. These disable inputs are pulled up with 10k ohm resistors so
that they may be connected to an open-collector output signal. Based on the status of the signal input
level detection and the disable inputs, the alarm logic and CPU control the signal input switch. You
can configure a variety of automatic switching strategies and also manually force the selection of
either input.
Since the TDC3303 operates with very low frequency time codes, it has DC coupled inputs and
outputs. To prevent excessive DC power drain due to an input fault that could result in a large static
DC voltage at the output, detection of a static DC input is performed. If such a condition exists on an
input, it will be disconnected from the output amplifiers, regardless of the status of the other input or
the switchmode setting.
The output signal from the switch is buffered and drives ten broadband output amplifiers. Output
signal level detectors for each of the ten channels are monitored by the alarm logic and CPU so that
output amplifier failure or interconnect cable short circuits may be observed.
All status information is reported via the front panel LEDs and the serial I/O port or optional ethernet
interface. A summary open-collector alarm output is provided.