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EDM01-06: DAG 3.7D Card User Guide 

©2006 

Version 1: March 2006 

LED Status 

The DAG 3.7D card has eight status LED’s, five coloured green, two 

orange and one blue as shown below: 

 

 
 
 
 
 
 
The LED definitions are shown below: 

 

LED 

Description 

Burst Manager Run (orange) 

FPGA successfully programmed . (blue) 

Signal Detect Port A (green. 

Not enabled 

Signal Detect Port B (green) 

Not enabled 

PPS out,. 

PPS in, . indicates card is receiving a PPS signal (green) 

Not enabled 

10 

Not enabled 

  
 

LED Display 

Functions 

On the DAG 3.7D card LED 8 flashes when a PPS signal is being received, 

LED 7 flashes when a PPS signal is being outputted.  
When DS3 signals are applied LEDs 3 and 5 should come on. The status of 

these LEDs should not change during normal operation of the card.  
LED 1 lights when a capture is in progress. 
The correct LED state for the DAG 3.7D card without input signal is shown 

below: 

 
 

Dagthree 

Utility 

The 

dagthree

 utility supports configuration status and physical layer 

interface statistics for the DAG 3.7D card.  
When troubleshooting, options 

–si 

should be passed to the tool to watch 

the operational status of the physical, PDH and framing layers. More details 

about the meaning of the various bits are supplied through the help page 

(

dagthree –h)

 as well as via the manual page. 

 
 

Synchronisation 

Input 

Rx A 

Tx A 

Rx B 

Tx B 

10 

Содержание DAG 3.7D

Страница 1: ......

Страница 2: ...64 7 839 0543 Americas Endace USA Ltd Suite 220 11495 Sunset Hill Road Reston Virginia 20190 United States of America Phone 1 703 382 0155 Fax 1 703 382 0155 Europe Middle East Africa Endace Europe Lt...

Страница 3: ...accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case t...

Страница 4: ...EDM01 16 DAG3 7D Card User Guide...

Страница 5: ...ity 8 LED Status 9 LED Display Functions 9 Dagthree Utility 9 Card ConfigurationOptions 10 Interface Statistics 11 Status Bits Display 11 Card Capture Session 12 Reporting Problems 14 Chapter 4 Runnin...

Страница 6: ...EDM01 16 DAG3 7D Card User Guide 2006 vi Version 1 March 2006...

Страница 7: ...e Description The purpose of this DAG Card installation guide is to describe Installing the DAG3 7D Confidence Testing Running Data Capture Synchronising Clock Time Data Formats Overview Pre requisite...

Страница 8: ...onent close association packets or cells are time stamped accurately Time stamped packet records are stored in the FPGA which interfaces to the PCI bus All packet records are written to host PC memory...

Страница 9: ...equires a specific image to do so Please contact Endace Customer Support at support endace com for more information Records are then transferred from the FIFO into the FPGA which has interfaces to the...

Страница 10: ...lot with 3 3V and 5V power Software distribution free space of 30MB Endace Linux Install CD requires 6GB Operating System For convenience a Debian 3 1 Sarge Linux system is included on the Endace Soft...

Страница 11: ...erting the Card Inserting the DAG 3 7D card into a PC involves accessing the PCI X bus slot fitting the card and replacing bus slot cover Follow the steps below to insert the DAG 3 7D card in the comp...

Страница 12: ...EDM01 06 DAG 3 7D Card User Guide 2006 6 Version 1 March 2006...

Страница 13: ...EDM01 06 DAG 3 7D Card User Guide 2006 7 Version 1 March 2006...

Страница 14: ...signal source should meet DS3 template of ANSI T102 1993 Figure 4 and STS 1 template of ANSIT102 1993 Figure 5 Loss characteristics of the WE728A or RG 59B cable should be better than Figure C2 of ANS...

Страница 15: ...LED 7 flashes when a PPS signal is being outputted When DS3 signals are applied LEDs 3 and 5 should come on The status of these LEDs should not change during normal operation of the card LED 1 lights...

Страница 16: ...all buffer memory to receive streams no rxmonitor Used with DS3X monitor tap Enabling the pre amplifier adds approx 20dB of linear amplification no descramble dis enable receive cell scrambling ATM on...

Страница 17: ...st time read In our example the interval is set to one second via the i option LoS DS3 Loss of Signal This indicates that there is no signal at the receiver or signal strength is too low to be recogni...

Страница 18: ...nfiguration Learn about the link layer configuration in use at the network link being monitored Important parameters include m23 Vs c bit framing as well as the mapping in use If the information canno...

Страница 19: ...odrop routesource stream0 buf 128MiB rxstreams 1 txstreams 0 mem 128 0 Configure in WYSYCC Style If the card is configured for c bit ds3_cbit framing mode but m13 23 framing is required changing the s...

Страница 20: ...PC type and configuration Host PC operating system version DAG software version package in use Any compiler errors or warnings when building DAG driver or tools For Linux and FreeBSD messages generat...

Страница 21: ...n during capture it may be wanted to omit it for automated trace runs If the o tracefile parameter is not specified the tool will write to stdout which can be used to pipeline dagsnap with other tools...

Страница 22: ...are being processed in real time a faster host CPU may be required Increasing Buffer Size The host PC buffer can be increased to deal with bursts of high traffic load on the network link By default t...

Страница 23: ...riance between sets of DAG cards or between DAG cards and coordinated universal time UTC Accurate time reference can be obtained from an external clock by connecting to the DAG card using the synchron...

Страница 24: ...ersion information x clearstats clear clock statistics k sync wait for duck to sync before exiting d dag DAG device to use K timeout sync timeout in seconds default 60 l threshold health threshold in...

Страница 25: ...onise its own clock then the DUCK clock is less smooth because the PC clock is adjusted in small jumps However the DUCK clock does not drift away from UTC The synchronisation achieved is not as accura...

Страница 26: ...nector ports of both cards with a standard RJ 45 Ethernet cross over cable Configure one of the cards as the master the other defaults to being a slave dag endace dagclock d dag0 none overout muxin no...

Страница 27: ...such as a GPS or CDMA time receiver Pulse Signal from External Source The DAG synchronisation connector accepts a RS 422 Pulse Per Second PPS signal from external sources This is derived directly fro...

Страница 28: ...d some distance from a DAG card Existing RJ 45 building cabling infrastructure can be used to cable synchronisation ports The TDS 2 and the DAG card synchronisation port should never be connected to E...

Страница 29: ...t A 2 Out A 3 In A 4 In B 5 In B 6 In A 7 Out B 8 Out B Out pin Connections Normally the GPS input should be connected to the A channel input pins 3 and 6 The DAG card can also output a synchronizatio...

Страница 30: ...EDM01 06 DAG 3 7D Card User Guide 2006 24 Version 1 March 2006...

Страница 31: ...flags rlen lctr wlen rlen 16 bytes of record timestamp The time of arrival of the cell an ERF 64 bit timestamp type 1 TYPE_HDLC_POS PoS w HDLC framing or 3 TYPE_ATM ATM cell flags This byte is divided...

Страница 32: ...Relay The record is described below BYTE 3 BYTE 2 BYTE 1 BYTE 0 timestamp timestamp type 1 flags rlen lctr wlen HDLC Header rlen 20 bytes of record ATM Cell record The record format for the ATM cell c...

Страница 33: ...gle 64 bit subtraction It is not necessary to check for overflows between the two halves of the structure as is needed when comparing Unix time structures which are also available to Windows user in t...

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