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3.6

Top and Bottom Assembly Drawings

3.6.1

Top Assembly Drawing

Apr 2020

Multi-Layer

Confidential

ME-ST1.PcbDoc

Copyright 

©

 by Enclustra GmbH

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L1-T

op

M1-PCB Outline

FID1809

C1

78

2

C1761

D401

C1

77

3

J1

60

2

J1

50

2

C1706

C1

78

7

Q1601

C1

76

2

R1515

D1605

D1604

D1606

D1607

D1500

D1501

R1501

FB

60

0

C1

71

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R1

50

3

R1506

FB

60

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C1732

R1404

D1400

C1

76

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C1

71

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L1

70

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R1618

R1

70

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C1703

C1702

D6

01

L1701

R6

08

R6

09

Q1700

R6

10

R6

04

R6

11

R6

05

C238

U51

1

U508

C239

C4

19

U5

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C4

18

C1

75

5

R704

D1

60

0

C213

U5

04

U5

02

C227

U4

01

C1759

R5

12

U5

05

U5

03

R502

U5

07

R4

04

R4

03

R4

06

R4

05

U5

01

C1

74

9

C217

C4

11

C1

75

7

C233

C237

C230

C408

R1

20

4

C234

Y400

R421

C402

R41

1

C409

C404

R424

R423

R425

R1205

C1206

R1200

C2

29

C231

C2

18

C401

C403

C1

75

4

C224

C2

35

FB800

R801

D602

C501

C2

43

C2

44

C222

C1771

C1765

C1

21

1

C1

74

7

R7

05

D4

02

D1201

C1

21

0

C1

20

9

R8

05

C8

09

U800

R8

03

D1

30

3

C1

20

8

C1

40

1

R8

04

C8

08

R8

02

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C2

03

D1302

C1

31

0

C1

40

0

C1741

C1

73

6

C2

07

C2

06

R904

R903

R1301

R1300

C1777

Y8

02

R807

C209

C200

C2

01

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C303

C1731

R1512

R8

06

M1823

C304

C3

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C1743

C1778

R1309

R1305

C1775

C1776

D1

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C1786

C1

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R1302

R1303

C1

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C1

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C1

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C3

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R1

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R9

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R3

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R3

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R3

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R3

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R1

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R1

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R1

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C1

106

C1

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C606

C1

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FB

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M1819

C6

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C607

R614

J1

50

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J1

50

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C900

J601

J1

50

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C6

03

FID181

1

R1

80

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I18

01

FID

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M1

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M1

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Z1

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C1

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J1

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C1

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R1

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C1

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C1

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C800

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R506

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L1

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R4

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C1

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R1604

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C1726

P

in

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M12-Assembly 

T

op

R151

1

Figure 5: Board Top Assembly Drawing

D-0000-456-001

14 / 48

Version 02, 23.07.2020

Содержание ME-ST1-W

Страница 1: ...escription of its features and configuration options In addition references to other useful documents are included Product Information Code Name Product ME ST1 Mercury ST1 Base Board Document Informat...

Страница 2: ...he date of publication Enclustra GmbH reserves the right to make changes at any time without notice All information in this document is strictly confidential and may only be published by Enclustra Gmb...

Страница 3: ...4 Connectors Description 18 4 1 12 V External Power J1701 18 4 2 12 V Internal Power J1700 18 4 3 Fan Connector J1601 19 4 4 I O Voltage Selection J1602 19 4 5 Mercury Module Connector J200 J201 J300...

Страница 4: ...B Overview 34 6 5 2 USB 2 0 Device Controller FTDI 35 6 6 I2C Communication 36 6 7 HDMI 38 6 8 DisplayPort 39 6 9 MIPI 39 6 10 Clock Architecture 41 6 10 1 Clock Generator 42 7 Operating Conditions 43...

Страница 5: ...HY interfaces CSI CSI DSI HDMI 2 0a connector Mini DisplayPort connector Low jitter clock generator microSD card slot Simple integration by using a single 12 V voltage supply Small solution size 1 1 2...

Страница 6: ...due to a mechanical collision caused by large capacitors on the bottom side of the module Always check that the mounting holes on the base board are aligned with the mounting holes of the Mercury ST1...

Страница 7: ...1 3 Accessories Mercury FPGA or SoC module 12 V DC 1 5 A power supply USB 2 0 A to micro B USB cable D 0000 456 001 7 48 Version 02 23 07 2020...

Страница 8: ...he bottom side of the module Always check that the mounting holes on the base board are aligned with the mounting holes of the Mercury ST1 base board If the module cannot be mounted correctly due to t...

Страница 9: ...d can be used in combination with any Mercury module Depending on the equipped module some features may not be available The block diagram of the Mercury ST1 base board is shown in Figure 1 Figure 1 H...

Страница 10: ...C connector 2 MIPI D PHY connectors CSI CSI DSI HDMI 2 0 connector User I Os 2 40 pin Anios pin headers 3 12 pin IO connectors 2 user push bottons Supply voltage 12 V DC internal external Table 1 Base...

Страница 11: ...article code is shown in Table 3 The article code repre sents the product code followed by the revision the R suffix and number represent the revision number The revision changes and product known is...

Страница 12: ...3 5 Top and Bottom Views 3 5 1 Top View Figure 3 Board Top View D 0000 456 001 12 48 Version 02 23 07 2020...

Страница 13: ...iew Figure 4 Board Bottom View Please note that depending on the hardware revision and configuration the base board may look slightly different than shown in this document D 0000 456 001 13 48 Version...

Страница 14: ...C1734 C1201 R1202 C801 C800 U705 Q501 R508 U509 R810 C807 C806 C1110 R1400 R1401 C241 C242 C1111 R1402 R1403 C1200 C1204 C1740 C212 C1205 C1207 FB1301 Z1838 C1304 C1739 FB1302 FB801 C803 C208 C1305 C...

Страница 15: ...05 TP1400 TP1706 TP401 TP1708 TP1402 TP1800 FID1804 TP1703 TP1502 TP1602 TP1702 TP1601 TP201 TP1404 TP500 TP1406 TP1100 Z1851 Z1847 Z1848 M1809 Z1863 Designator J1506 Z1841 TP1801 FID1800 TP1401 TP400...

Страница 16: ...3 7 Board Dimensions Figure 7 Board Dimensions D 0000 456 001 16 48 Version 02 23 07 2020...

Страница 17: ...Weight 100 g without battery and module Table 4 Mechanical Data 3 9 Mechanical Components Table 5 describes the mechanical components present on the Mercury ST1 base board The listed elements are for...

Страница 18: ...can alternatively be powered through the internal power input connector J1700 The 12 V DC power source connected to J1700 must be filtered by external power circuitry Apply only 12 V DC to this conne...

Страница 19: ...ion jumpers are used to configure the VCC_IO_A VCC_IO_B and VCC_IO_C voltages that power the I O banks of the SoC FPGA device on the Mercury module Refer to Section 5 6 for details 4 5 Mercury Module...

Страница 20: ...board is equipped with two 10 100 1000 Mbit Ethernet ports The capability of the Ethernet interface depends on the connected Mercury module The RJ45 connectors are connected through magnetics directly...

Страница 21: ...t video signals through the links FPGA support is required video protocol implementation 4 14 microSD Card Slot J900 The enclosure of J900 is connected to GND The microSD card signals are connected vi...

Страница 22: ...FMC standard it has not been routed to a clock capable pin on the Mercury connector therefore the signal name does not contain the CC part Both GBT M2C clock pairs are AC coupled The user defined sig...

Страница 23: ...he Anios I O pins are connected directly to the FPGA SoC device Use only VCC_IO voltages compliant with the equipped FPGA SoC device any other voltage may damage the mounted Mercury FPGA SoC module as...

Страница 24: ...lled for buffering the real time clock on the connected Mercury FPGA SoC module The battery is not included Type Manufacturer FBA75002 S02B2101L TXGA Table 16 J1600 Battery Holder Type Warning There i...

Страница 25: ...pped FPGA SoC device Any other voltages may damage the equipped FPGA SoC device as well as other devices on the module or Mercury ST1 base board The JTAG connector available on the Mercury ST1 base bo...

Страница 26: ...3V3_MOD sec ondary source VCC_USBUB VCC_3V3_MOD N A Table 18 Generated Power Supplies The 3 3 V voltage coming from the Mercury module VCC_3V3_MOD is sequenced on the base board VCC_3V3 using a load s...

Страница 27: ...VCC_5V will start up and the mated Mercury module will drive up a 3 3 V supply VCC_3V3_MOD When this voltage becomes available on the base board the PWR_EN signal is set to high after a delay of 7 ms...

Страница 28: ...MOD signal is stable for 7 ms The PWR_GOOD signal is used for sequencing the 3 3 V voltage coming from the module refer to Figures 8 and 9 for details 5 6 I O Voltage Selection The I O voltage selecti...

Страница 29: ...e pins must have a single power source To provide power to the VCC_IO_A B and C pins tree jumpers are included in the product deliverables Please note that not all combinations can be realized with ju...

Страница 30: ...C_OUT_A VCC_OUT_A is suppling VCC_IO_A B C 11 13 VCC_1V2 VCC_1V2 is suppling VCC_IO_C 9 11 VCC_OUT_B VCC_OUT_B is suppling VCC_IO_C 12 14 VCC_FMC_VIOB VCC_FMC_VIOB is suppling to VCC_IO_C Table 21 Jum...

Страница 31: ...Figure 11 VCC_IO Jumper Positions Pin Numbering and Configuration Example D 0000 456 001 31 48 Version 02 23 07 2020...

Страница 32: ...LED3 D1607 LED3 Mercury module User LED Table 22 Board LEDs For details on the LED connections refer to the Mercury ST1 Base Board User Schematics 4 6 2 Buttons All buttons are active low their funct...

Страница 33: ...omments CFG 1 BOOT_MODE0 OFF BOOT_MODE0 is set to 1 Refer to the Mercury module ON BOOT_MODE0 is set to 0 user manual CFG 2 BOOT_MODE1 OFF BOOT_MODE1 is set to 1 Refer to the Mercury module ON BOOT_MO...

Страница 34: ...bes the connectivity options for USB on the Mercury ST1 base board The default configu ration is marked in bold USB 3 0 support is possible when the Mercury module is equipped with a Cypress FX3 USB 3...

Страница 35: ...llows FPGA serial configuration and SPI flash programming over USB from a host computer without additional hardware Port A of the FTDI device is used for Xilinx JTAG implementation Port B of the FTDI...

Страница 36: ...led low For the slave passive serial configuration BOOT_MODE0 must be pulled high or left open while for master active serial configuration BOOT_MODE0 must be pulled low Warning After Mercury module s...

Страница 37: ...are connected with 0 resistor jumpers to HDMI and FMC connectors The programmable oscillator Si570 is not equipped on the Mercury ST1 base board by default therefore the address space 0x2A is not aut...

Страница 38: ...used for the redriver configuration The three HDMI data lanes are routed to the Mercury module connector C C 45 47 C 51 53 C 57 59 to be connected to transceivers for modules having MGTs on these pin...

Страница 39: ...nected Mercury module This interface is protected against electrostatic discharge by using TVS diodes Figure 15 Mini DisplayPort Connector with LVDS Transceiver 6 9 MIPI Two MIPI Mobile Industry Proce...

Страница 40: ...Modules When a display is used for MIPI1 interface the FPGA I2C must be connected to MIPI0 interface for the CCI function leaving the I2C MIPI1 pins available for the power connections refer to Table...

Страница 41: ...Remove Equip Zynq Ultrascale Zynq 7000 and similar Intel FPGA families R1019 R1020 R1021 R1027 Table 31 MIPI Connector 1 CSI Hardware Changes for older FPGA Families 6 10 Clock Architecture The Mercu...

Страница 42: ...t clock configuration at power up The NVM is a one time pro grammable OTP memory The Si5338B device can be reconfigured to desired functionality via the I2C interface ClockBuilder TM Desk top Software...

Страница 43: ...ng Conditions Table 34 indicates the recommended operating conditions for Mercury ST1 base board Symbol Description Rating Unit VCC_MAIN_IN Supply voltage relative to GND 12 V VCC_IO_ x VCC I O input...

Страница 44: ...tra online request order form for ordering or requesting information http www enclustra com en order 8 2 Support Please follow the instructions on the Enclustra online support site http www enclustra...

Страница 45: ...l Power Connector 18 7 J1701 External Power Connector Type 18 8 J1700 Internal Power Connector 18 9 J1700 Internal Power Connector Type 18 10 J1601 Fan Connector 19 11 J1601 Fan Connector Type 19 12 M...

Страница 46: ...34 Recommended Operating Conditions 43 35 USB Use Case Scenario 48 D 0000 456 001 46 48 Version 02 23 07 2020...

Страница 47: ...Board Known Issues and Changes Ask Enclustra for details 6 Mercury ST1 Base Board 3D Model PDF Ask Enclustra for details 7 Mercury ST1 Base Board STEP 3D Model Ask Enclustra for details 8 Module Pin C...

Страница 48: ...e using USB B KX2 On Off 0 USB HS0 USB B VBUS USB A USB B option with FX3 CA1 3 Dual HS USB XU1 Module option XU5 XU7 Off On 0 USB HS0 USB HS1 USB B USB A USB B USB A with PS SS0 and SS1 XU8 XU9 4 Dua...

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