
Embest Technology
Copyright © 2014-2015 Embest Technology SBC9000 User Manual
12
Pins
Definitions
Descriptions
58
EIM_DA0
EIM LSB multiplexed address/data bus signal
59
EIM_DA8
EIM LSB multiplexed address/data bus signal
60
EIM_DA15
EIM LSB multiplexed address/data bus signal
61
EIM_DA7
EIM LSB multiplexed address/data bus signal
62
EIM_DA4
EIM LSB multiplexed address/data bus signal
63
EIM_DA3
EIM LSB multiplexed address/data bus signal
64
EIM_DA5
EIM LSB multiplexed address/data bus signal
65
EIM_DA2
EIM LSB multiplexed address/data bus signal
66
EIM_DA6
EIM LSB multiplexed address/data bus signal
67
EIM_DA1
EIM LSB multiplexed address/data bus signal
68
CSPI1_SS1
SPI1 chip select
69
CSPI1_CLK
SPI1 clock
70
CSPI1_MOSI
SPI1 master output salve input
71
CSPI1_MISO
SPI1 master input salve output
72
UART3_RXD
UART3 receive data
73
UART3_TXD
UART3 transmit data
74
UART2_RXD
UART2 receive data
75
UART2_TXD
UART2 transmit data
76
GND
GND
77
UART3_CTS
UART3 clear to send
78
UART3_RTS
UART3 request to send
79
UART2_RTS
UART2 request to send
80
UART2_CTS
UART2 clear to send
81
USB_H1_OC
Host 1 external input for VBUS
82
USB_OTG_OC
overcurrent detection
83
USB_HOST_DP
OTG External input for VBUS
84
USB_HOST_DN
overcurrent detection
85
USB_RSTn
USB host data+
86
SD1_WP
USB host data-
87
SD1_DATA3
USB host reset control signal
88
SD1_CLK
SD1 card write protect detect signal
89
SD1_DATA2
SD1 data 3
90
SD1_DATA1
SD1 clock
91
SD1_DATA6
SD1 data 2
92
SD1_DATA0
SD1 data 1
93
SD1_DATA7
SD1 data 6
94
GND
SD1 data 0
95
SD1_DATA5
SD1 data 7
96
SD1_DATA4
GND
97
SD1_CMD
SD1 data 5
98
SD1_CD
SD1 data 4
99
SD2_WP
SD1 command signal