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USER MANUAL JetKit-3010 ELMA.COM
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Features:
- End-to-end lossless compression
- Tile Caching
- OpenGL 4.6, OpenGL ES 3.2, and Vulkan 1.0
- Adaptive Scalable Texture Compression (ATSC) LDR profile supported
- DirectX 12 compliant
- CUDA support
- Iterated blend, ROP OpenGL-ES blend modes
- 2D BLIT from 3D class avoids channel switch
- 2D color compression
- Constant color render SM bypass
- 2x, 4x, 8x MSAA with color and Z compression
- Non-power-of-2 and 3D textures, FP16 texture filtering
- FP16 shader support
- Geometry and Vertex attribute Instancing
- Parallel pixel processing
- Early-z reject: Fast rejection of occluded pixels acts as multiplier on pixel shader and
texture performance while saving power and bandwidth
- Video protection region
- Power saving: Multiple levels of clock gating for linear scaling of power
2.4.2 Tensor Cores 2
Tensor Cores and their associated data paths are custom-crafted to dramatically increase floating-
point compute throughput. Each Tensor Core performs 64 floating point FMA mixed-precision
operations per clock, eight Tensor Cores in an SM perform a total of 1024 floating point operations
per clock. Tensor Cores operate on FP16 input data with FP32 accumulation; the FP16 multiply
results in a full precision result that is accumulated in FP32 operations. Each Tensor Core provides
a 4 × 4 × 4 matrix processing array which performs the operation D = A × B + C, where A, B, C
and D are 4 × 4 matrices. The matrix multiply inputs A and B are FP16 matrices, while the
accumulation matrices C and D may be FP16 or FP32 matrices.
A graphical overview on this operation can be seen in Figure 1.
Figure 1 - Matrix processing
2
Tensor Cores description is taken from NVIDIA
®
Xavier
™
Series System-on-Chip Technical Reference Manual
Source: Nvidia
®