EM78P447N
8-Bit Microcontroller with OTP ROM
Product Specification
(V1.1) 03.30.2005
•
9
(This specification is subject to change without further notice)
Aaddress
R PAGE registers
IOC PAGE registers
00
R0
(Indirect Addressing Register)
Reserve
01
R1
(Time Clock Counter)
CONT
(Control Register)
02
R2
(Program Counter)
Reserve
03
R3
(Status Register)
Reserve
04
R4
(RAM Select Register)
Reserve
05
R5
(Port5)
IOC5
(I/O Port Control Register)
06
R6
(Port6)
IOC6
(I/O Port Control Register)
07
R7
(Port7)
IOC7
(I/O Port Control Register)
08
General Register
Reserve
09
General Register
Reserve
0A
General Register
Reserve
0B
General Register
IOCB
(Wake-Up Control Register for Port6 )
0C
General Register
Reverse
0D
General Register
Reverse
0E
General Register
IOCE
(WDT,SLEEP2,Open Drain,R -Option
Control Register)
0F
General Register
IOCF
(Interrupt Mask Register)
10
︰
1F
General Registers
20
:
3E
Bank0
Bank1
Bank2
Bank3
3F
R3F
(Interrupt Status Register)
Fig. 4 Data Memory Configuration