Elan Digital Systems Ltd.
36
HD717 USER’S
GUIDE
4. HD717 REGISTER INTERFACE
The HD717 decodes the incoming PCMCIA interface. It maps the
CIS EPROM to 0-3FF,800-BFF etc. in attribute space. The range
400-7FF is occupied by the PCMCIA config option register inside
the HD717 (it repeats every byte). Both the CIS and COR are
always active.
The COR is used as a master enable, as defined by PCMCIA 2.01.
That is, when a valid config is written in bits0..5 the card's I/O
interface may function. Until this has happened, the card's I/O
interface is disabled. A config value of 0 will disable the card (NB
this is the state after a reset). The only valid CONFIG value is 01
d
.
Bit7 of the COR acts as a soft reset when set (the reset does not clear
bit7 but a subsequent write to the config register to return bit 7 to
zero should not attempt to load data into bits 6..0 of the register as
they will still clear. This should be done as a separate write
operation.)
All HD717 functions are accessed via eight I/O ports (starting at
IOBASE as mapped by the host controller). The HD717 decodes
A0, A1 and A2 and arranges the various registers as shown:
Address
I/O Read
I/O Write
0
SCC CONTROL
SCC CONTROL
1
SCC RX DATA
SCC TX DATA
2
IPR[7:0]
IMR[7:0]
3
LRDRXLO[7:0]
LRDTXLO[7:0]
4
LRDRXHI[3:0]
LRDTXHI[3:0]
5 SUB REG DATA[7:0]
SUB REG DATA[7:0]
6
NOT USED
SUB REG IDX[3:0]
7
RX 4K FIFO
TX 4K FIFO
