EV8AQ160TPY-DK
1
BDC- 1-Sep-10
e2v semiconductors SAS 2010
EV8AQ160
VITA 57 FMC Quad 8-bit ADC Demo Kit
Preliminary Datasheet
This document provides an overview of e2v’s VITA 57 FMC Quad 8-bit ADC Demo Kit.
Main Features
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Sampling of analog signals using EV8AQ160 Quad 8-bit ADC
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4 analog inputs with different configurations
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Differential driver (2 types of amplifier provided)
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Balun RF transformer.
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Direct input.
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Clock Input:
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External clock
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or/ programmable clock generated by a PLL (2.4G to 2.7 Gsps)
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Interfacing ADC Digital outputs with an external acquisition system either with
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A logic analyzer
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An FPGA development board using the VITA57 FMC standard
http://www.vita.com/fmc.html
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100% compatible with XILINX VIRTEX 6 evaluation kit ML605
o
http://www.xilinx.com/products/devkits/EK-V6-ML605-G.htm
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FFT computation (PC software provided)
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Flexible and easy to operate via USB2 control (PC software provided without any license)
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Programming of ADC settings
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Programming of ADC environment
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Monitoring of ADC currents and junction temperature
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Universal 12V power Adapter
Operating conditions
Temperature range: 10°C < Tamb < 40°C
Operating with a Microsoft Windows PC environment (Windows 2000, Windows XP, Windows
Vista) via USB interface.
Содержание EV8AQ160
Страница 49: ...EV8AQ160TPY DK 49 BDC 1 Sep 10 e2v semiconductors SAS 2010 INL Curve FFT spectrum...
Страница 63: ...EV8AQ160TPY DK 63 BDC 1 Sep 10 e2v semiconductors SAS 2010...
Страница 68: ...EV8AQ160 DK 68 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 41 Temperature sense and current measurement...
Страница 69: ...EV8AQ160TPY DK 69 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 42 FX2 microcontroller and ADC level shifting...
Страница 71: ...EV8AQ160TPY DK 71 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 44 Analog input configuration and SYNC signal...
Страница 72: ...EV8AQ160 DK 72 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 45 Output connector HPC port A and Port B...
Страница 73: ...EV8AQ160TPY DK 73 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 46 Clock configuration and PLL...
Страница 74: ...EV8AQ160 DK 74 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 47 Output connector HPC port C and Port D...
Страница 78: ...EV8AQ160 DK 78 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 53 internal Layer 5 Figure 54 internal Layer 6...
Страница 80: ...EV8AQ160 DK 80 BDC 1 Sep 10 e2v semiconductors SAS 2010 Figure 57 internal Layer 9 Figure 58 internal Layer 10...