DSM 96M4211o, Руководство пользователя

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96M4211o User’s Manual Watchdog Timer Programming Guide
Watchdog Timer Programming Guide 50
** Chip ( Global ) Control Register ( CCR ) : CR02 -->CR2F.
CR07 = Logical Device Number Register ( LDNR )
** Logical Device 0 ( LD0 ) = FDC , with CR : CR30 -->CRF5 .
When LDNR (= CR07) = 00h , you can program the CR30 --CRF5
related to FDC feature .
** Logical Device 1 ( LD1 ) = Parallel Port,with CR :CR30 -->CRF0.
** LD2 = UART A ( Serial Port 1) ,with CR :CR30 -->CRF0.
** LD3 = UART B ( Serial Port 2) ,with CR :CR30 -->CRF1.
** LD5 = KBC ,with CR :CR30 -->CRF0.
** LD6 = CIR ,with CR :CR30 -->CR70.
** LD7 = GAME PORT,MIDI PORT & GP I/O Port I,with CR :CR30 -->CRF2.
** LD8 = GP I/O Port II,with CR :CR30 -->CRF7.
** LD9 = GP I/O Port III,with CR :CR30 -->CRF3.
** LDA = ACPI,with CR :CR30 -->CRFF.
** LDB = HARDWARE MONITOR, with CR : CR30 --> CRF0
(2) Related CR for WDT programming
CR2B-Bit 4 ; [0] for WDT function ( via Pin89 )
LD8-CRF5-Bit 3; Select WDT count time
0 = second.
1 = minute.
LD8-CRF6 ; WDT time-out period ,
00h = disabled
01h = 1 second/minute .
02h = 2 seconds/minutes .
03h = 3 seconds/minutes .
04h = 4 seconds/minutes .
05h = 5 seconds/minutes .
..........
FEh = 254 seconds/minutes .
FFh = 255 seconds/minutes .
When writing a non-zero value to LD8-CRF6 , this
value will be loaded into WDT counter and start
to count down .Read this register can not get the
WDT time-out period ( the orginal one written into
) , but the current value in WDT counter .
Enable and Refresh WDT : program LD8-CRF6 a
non-zero value .
Disable WDT : program LD8-CRF2 with 00h .
LD8-CRF7- Bit 4 : WDT Status
1 = WDT time-out happened
0 = WDT counting .