13
28
NC
No connection
29
EB0
Even data bit B0
30
EB1
Even data bit B1
31
EB2
Even data bit B2
32
EB3
Even data bit B3
33
EB4
Even data bit B4
34
EB5
Even data bit B5
35
EB6
Even data bit B6
36
EB7
Even data bit B7
37 GND
Ground
38 GND
Ground
39
CLK
Dot clock
40 NC
No
connection
CN3 – Panel connector: HIROSE DF20G-50DP-1V (Matching type : DF20A-50DS-1C)
PIN SYMBOL
DESCRIPTION
1 GND
Ground
2 GND
Ground
3 NC
No
connection
4
NC
No connection
5
OR0
Odd data bit R0
6
OR1
Odd data bit R1
7
OR2
Odd data bit R2
8
OR3
Odd data bit R3
9
OR4
Odd data bit R4
10
OR5
Odd data bit R5
11
OR6
Odd data bit R6
12
OR7
Odd data bit R7
13 GND
Ground
14 GND
Ground
15 NC
No
connection
16 NC
No
connection
17
OG0
Odd data bit G0
18
OG1
Odd data bit G1
19
OG2
Odd data bit G2
20
OG3
Odd data bit G3
21
OG4
Odd data bit G4
22
OG5
Odd data bit G5
23
OG6
Odd data bit G6
24
OG7
Odd data bit G7
25 GND
Ground
26 GND
Ground
27
NC
No connection
28
NC
No connection
29
OB0
Odd data bit B0
30
OB1
Odd data bit B1
31
OB2
Odd data bit B2
32
OB3
Odd data bit B3
33
OB4
Odd data bit B4
34
OB5
Odd data bit B5
35
OB6
Odd data bit B6
36
OB7
Odd data bit B7
37 GND
Ground
38 GND
Ground
39
VS
Vertical sync
40 CLK
Dot
clock
41 HS
Horizontal
sync
42 DE
Display
enable
43
PWR
Power down control signal (5v TTL)
44
VLCD
Panel power supply (3,3V/5V) (selected by JA3 & JA6)
45
VLCD
Panel power supply (3,3V/5V) (selected by JA3 & JA6)
46
VLCD
Panel power supply (3,3V/5V) (selected by JA3 & JA6)
47
NC
No connection
48
VLCD12
+12V panel supply (selected by JA3 & JA6)
49
VLCD12
+12V panel supply (selected by JA3 & JA6)
50
VLCD12
+12V panel supply (selected by JA3 & JA6)
Содержание 41710013X-3
Страница 24: ...24 Appendix III Mapping definition Definition of Mapping A...
Страница 25: ...25 Definition of Mapping B...