DIGITAL-LOGIC AG
MSM800 SEV Manual V1.0A
40
5.1.3
Flat Panel Functional Description
The FP connects to the RGB port of the video mixer.
LCD Interface:
The FP interfaces directly to industry standard 18-bit or 24-bit active matrix thin-film-transistor (TFT).
The digital RGB or video data that is supplied by the video logic is converted into a suitable format to drive a
wide variety range of panels with variable bits.
The LCD interface includes dithering logic to increase the apparent number of colors displayed for use on
panels with less than 6 bits per color. The LCD interface also supports automatic power sequence of
panel power supplies.
Mode Selection:
The FP can be configured for operation with most standard TFT panels in the bios setup:
Supports TFT panels with 18 bit or 24-bit interface with 320x240, 640x480, 800x600, 1024x768, 1280x1024,
and 1600x1200 pixel resolutions. Either one or two pixels per clock is supported for all resolutions.
For TFT panel support, the output from the dither block is directly fed on to the panel data pins (DRGBx).
The data that is being sent on to the panel data pins is in sync with the TFT timing signals such as HSYNC,
VSYNC, and LDE.
One pixel (or two pixels in 2 pix/clk mode) is shifted on every positive edge of the clock as long as
DISP_ENA is active.
Enter the bios with F1
-
Select C (Motherboard Device Configuration)
-
Select F (Video and Flatpanel Configuration
-
Output Display = Flast Panel
o
Flat Panel Configuration
TYPE = TFT
•
Resolution = 320x240, 640x480, 800x600, 1024x768, 1280x1024, or
1600x1200 pixel
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