Digilent Nexys 3 Скачать руководство пользователя страница 20

Nexys 3™ FPGA Board Reference Manual 

 

 

Copyright Digilent, Inc. All rights reserved. 

Other product and company names mentioned may be trademarks of their respective owners.

 

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All FPGA pins routed to the VHDC connector are located in FPGA I/O bank0. The FPGA's bank0 I/O power supply 
pins and the VHDC connector's four Vcc pins are connected together by a small, segregated power supply plane in 
the PCB. This sub-plane can be connected to 2.5V or 3.3V, depending on the position of jumper JP8. This 
arrangement allows peripheral boards and the FPGA to share the same Vcc and signaling voltage across the 
connector, whether it be 3.3V or 2.5V. 

The unregulated board voltage VU5V0 (nominally 5V) is also routed to four other VHDC pins, supplying up to 1A of 
additional current to peripheral boards. A second jumper (JP4) allows the unregulated board voltage to be 
disconnected from the VHDC connector if desired. 

All I/O's to the VHDC connector are routed as matched 
pairs to support LVDS signaling, commonly powered at 
2.5V. The connector uses a symmetrical pinout (as 
reflected around the connector's vertical axis) so that 
peripheral boards as well as other system boards can be 
connected. Connector pins 15 and 49 are routed to FPGA 
clock input pins. 

 

 

VU

Pin 34

Pin 68

Pin 1:IO1-P

Pin 35:IO1-N

VCC

10 Matched Pairs

10 Matched Pairs

Clock Inputs

 

 

VHDC Connector Pinout 

IO1-P: B2 

IO1-N: A2 

IO11-P: C10 

IO11-N: A10 

IO2-P: D6 

IO2-N: C6 

IO12-P: G9 

IO12-N: F9 

IO3-P: B3 

IO3-N: A3 

IO13-P: B11 

IO13-N: A11 

IO4-P: B4 

IO4-N: A4 

IO14-P: B12 

IO14-N: A12 

IO5-P: C5 

IO5-N: A5 

IO15-P: C13 

IO15-N: A13 

IO6-P: B6 

IO6-N: A6 

IO16-P: B14 

IO16-N: A14 

IO7-P: C7 

IO7-N: A7 

IO17-P: F13 

IO17-N: E13 

IO8-P: D8 

IO8-N: C8 

IO18-P: C15 

IO18-N: A15 

IO9-P: B9 

IO9-N: A9 

IO19-P: D14 

IO19-N: C14 

IO10-P: D11 

IO10-N: C11 

IO20-P: B16 

IO20-N: A16 

 

10.2  Pmod Ports 

Pmod ports are 2x6 right-angle, 100-mil female connectors that mate with standard 2x6 pin headers available from 
a variety of catalog distributors. Each 12-pin Pmod port provides two 3.3V VCC signals (pins 6 and 12), two Ground 
signals (pins 5 and 11), and eight logic signals. VCC and Ground pins can deliver up to 1A of current. Pmod data 

 

3.3V 2.5V

Spartan 6

VHDC

VCCO

20 Matched Pairs

JP8

VU5V0

Bank0

JP4

 

 

 

Содержание Nexys 3

Страница 1: ...PGA and broad set of peripherals make the Nexys 3 board an ideal host for a wide range of digital systems including embedded processor designs based on Xilinx s MicroBlaze Nexys 3 is compatible with a...

Страница 2: ...Host Port Serial Prog Port 2 Micron Parallel PCM P8P BPI Port J8 Programming Mode SLV Serial SPI BPI UP M0 M1 6 pin JTAG Header J7 Prog Programming files are stored in SRAM based memory cells within...

Страница 3: ...ce has been programmed it can automatically configure the FPGA at a subsequent power on or reset event as determined by the J8 jumper setting Programming files stored in the PCM devices will remain un...

Страница 4: ...nd attach the power supply plug in the USB cable to the PC and to the USB port on the board start the Adept software turn ON Nexys 3 s power switch wait for the FPGA to be recognized Use the browse fu...

Страница 5: ...ay to verify many of the board s hardware circuits and interfaces These are divided into two major categories on board memory RAM and Flash and peripherals In both cases the FPGA is configured with te...

Страница 6: ...greatly simplifies passing control parameters into a design or reading low frequency status information out of a design 1 6 File I O The File I O tab can transfer files between the PC and the Nexys 3...

Страница 7: ...external power supply or battery pack can be used by setting JP1 to Wall The main regulator on the Nexys 3 can accommodate input voltages up to 5 5VDC An external DC wall plug supply should provide a...

Страница 8: ...hare a common bus and the serial PCM is on a dedicated quad mode x4 SPI bus The non volatile PCM memories are byte and bit alterable without requiring a block erase so they are faster and more versati...

Страница 9: ...alterable without requiring an erase cycle It supports the legacy SPI protocol as well as the newer Quad I O and Dual I O protocols at bus speeds up to 50MHz FPGA configuration files can be written to...

Страница 10: ...R20 G14 ADDR11 F17 ADDR2 J18 DATA10 P12 DATA1 T14 ADDR19 D17 ADDR10 F18 ADDR1 K17 DATA9 P6 DATA0 R13 ADDR18 D18 ADDR9 H13 ADDR0 K18 DATA8 N5 ADDR17 H12 ADDR8 H14 DATA7 R5 4 Ethernet PHY The Nexys 3 bo...

Страница 11: ...drive any or all of the four clock management tiles in the Spartan 6 Each tile includes two Digital Clock Managers DCMs and four Phase Locked Loops PLLs DCMs provide the four phases of the input freq...

Страница 12: ...nto the FPGA two are used as a keyboard port following the keyboard PS 2 protocol and two are used as a mouse port following the mouse PS 2 protocol Two PIC24 I O pins are also connected to the FPGA s...

Страница 13: ...ine which ASCII character to use Some keys called extended keys send an E0 ahead of the scan code and they may send more than one scan code When an extended key is released an E0 F0 key up code is sen...

Страница 14: ...nate system wherein moving the mouse to the right generates a positive number in the X field and moving to the left generates a negative number Likewise moving the mouse up generates a positive number...

Страница 15: ...manate from electron guns which are finely pointed heated cathodes placed in close proximity to a positively charged annular plate called a grid The electrostatic force imposed by the grid pulls rays...

Страница 16: ...memory with one or more bytes assigned to each pixel location the Nexys 3 uses three bits per pixel The controller must index into video memory as the beams move across the display and retrieve and a...

Страница 17: ...an arrange the counters to easily form video RAM addresses or to minimize decoding logic for sync pulse generation 9 Basic I O The Nexys 3 board includes eight slide switches five push buttons eight i...

Страница 18: ...d so any one of 128 patterns can be displayed on a digit by illuminating certain LED segments and leaving the others dark Of these 128 possible patterns the ten corresponding to the decimal digits are...

Страница 19: ...n a 1 will be displayed in digit position 1 Then if AN1 is asserted while CA CB and CC are asserted then a 7 will be displayed in digit position 2 If AN0 and CB CC are driven for 4ms and then A1 and C...

Страница 20: ...ing commonly powered at 2 5V The connector uses a symmetrical pinout as reflected around the connector s vertical axis so that peripheral boards as well as other system boards can be connected Connect...

Страница 21: ...rt A USB mouse can be connected to J4 for a simple visual demonstration If the demo configuration is not present in the BPI device it can be downloaded from the Digilent website and programmed directl...

Страница 22: ...Other product and company names mentioned may be trademarks of their respective owners Page 22 of 22 board fails test outside of the warranty period and cannot be easily repaired Digilent can repair...

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