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BIOS
3.5 Advanced Chipset Features
CAS Latency Time
It allows CAS latency time in HCLKs as 2 or 2.5. The system board designer
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installed DRAM or CPU.
Setting: 2.5 (Default), 2.
Interleave Select
It allows you to Use the Interleave Select option to specify how the cache
memory is interleaved.
Setting: LOI (Default), HOI.
XOR BA0
Setting: Disabled (Default), Enabled.
XOR BA1
Setting: Disabled (Default), Enabled.
Содержание Rhodeus-LC
Страница 4: ... 1 1 Introduction 1 Chapter 1 Introduction Chapter 1 Introduction ...
Страница 10: ... 7 Introduction 1 10 Board Dimensions Unit mm ...
Страница 11: ... 8 Introduction Unit mm ...
Страница 12: ... 9 Installation 2 Chapter 2 Installation Chapter 2 Installation ...
Страница 26: ... 23 BIOS 3 Chapter 3 BIOS Chapter 3 BIOS ...
Страница 44: ... 41 BIOS 3 8 PC Health Status Current CPU Temperature CPU MEM VCore VCC3 5V 12V VBAT V 5VSB ...
Страница 54: ... 51 Appendix 4 Chapter 4 Appendix Chapter 4 Appendix ...