DFI G586OPC, Руководство пользователя

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PCI/ISA System Board
17
Cache Configuration
The G586OPC system board can support either asyn-
chronous cache SRAM or synchronous (pipelined
burst) cache SRAM. Three cache sizes are supported:
256KB, 512KB and 1MB. 256KB is the default size.
Installing Asynchronous Cache SRAM
The SRAM sockets allow you to install either 32Kx8,
64Kx8 or 128Kx8 SRAM. Regardless of the amount of
cache memory installed, one 32Kx8 (U23) is needed for
tag RAM to store the cacheable addresses. The locations
of the SRAM sockets on the system board are shown on
the next page.
SRAM Socket