Denon S-5BD, Руководство по обслуживанию

Страница: 95 / 207

95
Analog Video SIGNAL LINE
Digital Audio SIGNAL LINE
Digital Video SIGNAL LINE
BD/DVD/CD PLAYDATA OUTPUT
SIGNAL LINE
DA0DQ17
AE3
SH_TDI
DA0DQS3
SDA1BA1
DA1DQS0
C24
+1.8V_D4
GND_D4
AT1RESET
GND_D4
UDIO7
C1
33
0.
01
Z
AT1DMARQ
NMI
PXDO14
AL22
M32_GPIO[4]
A5
ADO_SDO0
AM15
+1.1V_D4
GND_D4
+3.3V_D4
GND_D4
SDPXDO4
HADRS16
GND_D4
HADRS20
D3
HDATA3
L3
PXDO6
DA1DQ26
M33
GND_D4
+3.3V_D4
DA0DQ18
DA0DQS_N3
UDIO5 R1
DA1DQ29
M32
GND_D4
GND_D4
+3.3V_D4
SH_GPIO7[6]
AC29
PLL0AVDD33
GND_D4
TEST1
SH_GPIO0[2]
GND_A4
SDA0CLK1
AL1
+1.8V_D4
+1.1V_D4
SDA0A2
AJ3
PXDO7 AN21
+1.8V_D4
MDSEL2
AL32
+3.3V_D4
4.7K
R103
HADRS19
PXDO21
AN24
DA1DQ0
HADRS22
C140
0.1
GND_D4
ADATAO1
DA0DQM3
SRDY0 E17
GND_D4
+1.8V_D4
HDATA5
L2
M32_TMS
AF29
SDA0BA1
UDIO6
T2
ADO_SDO2
AJ15
SH_GPIO4[4]
+1.8V_D4
M32_TDO
AF30
GND_D4
GND_D4
DAC_AVDD33
GND_D4
DA1DQ6
DA1DQ3
A27
SH_GPIO3[7] C17
SH_GPIO3[1]
SH_GPIO4[6]
E15
SCIFSCK
E18
PLL_AVDD11
SDA0RAS_N
AL2
GND_D4
AT1ADR1
SDA0CKE
AK3
+1.8V_D4
SDA0CLK0N
AN2
HDATA13
DA0DQ9
SH_GPIO7[3]
AT1DATA8
BCKO
C1
21
0.
1Z
DA0DQS2
AC2
AT1CS1
T33
UCLK
+3.3V_D4
GND_D4
GND_D4
PLL_AVDD33
GND_D4
PXDO23
AUDCK AH31
SDA1RAS_N
DA1DQS_N0
D24
SDA0CAS_N
AJ2
SDA0A4
DA0DQ28
AB4
SDPXDO7
+3.3V_D4
SDA1A1
DA0DQ11
AM12
+1.8V_D4
GND_D4
TEST4 AM32
C134
0.1
SDA1A5
HCS_N1
H2
DA0DQ14
M32_GPIO[5]
B6
DA1DQS_N3
P32
GND_D4
+3.3V_D4
HADRS25
K5
AVSSDAC33
SDA1A9
F33
AT1ADR0
M32_GPIO[3]
C6
PXDO8
SDA0BA2
AK6
0.
1Z
C1
28
GND_D4
SDDATA1
SDA1CLK1N
B33
GND_D4
AT1DATA15
AT1DATA15
W31
GND_D4
GND_D4
SDA0CLK1N
VMCLK AE31
GND_D4
GND_D4
PXDO0
DA0DQ24
GND_D4
DA1DQ12
B24
SDA1CLK1N
DA0DQ29
AB2
0.
01
Z
C1
25
ADO_WS
SRDY0
SDPXDO0
SH_GPIO2[5]
E5
GND_D4
AUDATA1
GND_D4
SH_GPIO2[4]
D18
SDA1A8
SDA0BA0
GND_D4
+1.8V_D4
+1.8V_D4
SDA1A7
GND_D4
RESET_N
AL33
+1.1V_D4
GND_D4
GND_D4
PXDO17
HADRS7
HCS_N0
HCS_N3
G1
SDA1A10
+1.8V_D4
SH_GPIO1[0]
HADRS13
L5
SH_GPIO6[3]
MDSEL0
AK31
+1.8V_D4
GND_D4
HADRS2
SDA1WE_N
GND_D4
SDPXDO5
REXT
GND_D4
TEST5
AUDSYNC
AUDATA0 AG32
+1.8V_D4
USTP
T5
AT1DMACK
V31
AT1DATA8
AB30
DA1DQ9
GND_D4
DA1DQ20
L31
SH_TMS
PXDO17 AN23
GND_D4
PXDO10
AJ19
DA1DQS2
L32
HDPD0
DA0DQS1
MDSEL1
GND_D4
DA0DQ21
AF2
AT1DATA5
AB33
HADRS21
DA1DQ7
C26
+1.1V_D4
+1.8V_D4
PXCLK
AL24
PXDO15
ATEST
GND_D4
DA1DQM2
PXDO12
GND_D4
DA0DQ8
SH_GPIO7[7] A9
+1.8V_D4
+1.1V_D4
ASEBRKAK_N
AK33
GND_D4
PXDO13
GND_D4
UDIO4 R2
GND_D4
HADRS5
WE_N0
+1.8V_D4
HDPD0 AN32
GND_A4
SDA1A8
G32
M32_GPIO[0]
E11
AD31
PLL1DVSS10
SH_GPIO3[6]
SDA0A9
HADRS19
K4
DA0DQ6
DA1DQ27
SH_TCK
SDA1CLK0N
GND_A4
DA0DQ23
AE1
UDIO0 P2
GND_D4
DA0DQ2
AM7
HADRS9
SDA1BA2
SDPXDO1
PXDO16
DA0DQM2
AC4
+1.8V_D4
SH_GPIO7[0] E12
SH_GPIO5[6] A4
ADATAO3
AL26
UDIR
ATEST
AF31
SH_GPIO3[3]
TEST0
AK30
AT1DIOW
GND_D4
AT1ADR2
U32
AT1ADR0
U33
0.
01
Z
C1
32
SDPXDO1
AK17
HDATA13
N2
HDATA6
DA0DQ16
AE2
GND_D4
GND_D4
AT1DATA2
+3.3V_D4
AT1DATA12
DA1DQ16
SDA0CS_N
AJ1
DA0DQS_N3
Y2
GND_D4
DA1DQ13
ADATAO0
SDA0WE_N
AM4
GND_D4
GND_D4
AJ28
AVDDDAC33REF
DA1DQ25
N31
AL28
DVSSDAC10
AT1DATA7
AC33
SH_GPIO3[0]
+1.8V_D4
SH_GPIO6[2] A11
C137
0.1
GND_D4
GND_D4
GND_D4
+3.3V_D4
SDA0ODT
AK1
+1.8V_D4
C139
0.1
GND_A4
DA1DQS3
P33
SH_GPIO2[3]
M32_TMS
SDPXVS
AJ16
GND_A4
HDATA11
M1
+1.8V_D4
SDA1A2
E31
DAC_AVDD33
SH_GPIO1[7]
+1.8V_D4
GND_D4
PXDO14
+1.8V_D4
GND_D4
DA0DQM1
AK13
GND_D4
PXDO18 AM23
DA1DQ28
M30
SDA0CLK0
UDIO1 P1
SH_GPIO0[1]
WE_N0
J2
SDA0CAS_N
REXT
AH27
AT1DATA9
DA0DQ22
STXD0
A17
PXDO5 AL20
GND_D4
SDA1RAS_N
C32
DAC_AVDD33
SH_GPIO6[1]
SCIFTXD
SDA0A8
+1.8V_D4
SH_GPIO4[2]
GND_A4
SH_GPIO4[3]
SDA1CLK1
C33
DA1DQ16
J32
SDWP V1
HDATA2
C
1
2
4
0
.
1
Z
VMCLK
+1.8V_D4
DA0DQ31
W3
HDATA7
DA1DQ24
SH_GPIO6[0]
SH_GPIO0[3]
PXDO2 DA0DQ0
DA0DQ6
AN9
AJ29
AVSSDAC33REF
+1.8V_D4
SDA1CLK0
A31
+1.8V_D4
HADRS11
+1.8V_D4
HDATA6
M3
DA0DQ27
DA1DQ10
D22
SH_GPIO6[7]
DA1DQ14
DA0VREF0
AB6
AUDATA3 AH32
PLL_AVDD33
HADRS0
SDCMD V3
SH_GPIO3[7]
TEST1
AJ30
SH_GPIO4[6]
DA1DQM0
B25
AD32
PLL1DVDD10
GND_D4
+1.8V_D4
UDIO3
SDDATA3
GND_A4
DA1DQ5
D27
SH_GPIO6[2]
GND_D4
+3.3V_D4
AT1DATA5
SH_TMS
AE33
+1.8V_D4
GND_D4
ADO_SDO2
AT1DATA11
AA31
DA0DQ23
DA1DQ5
TEST2
SDA0A6
WP_N
D8
+1.8V_D4
PXDO13
AM22
GND_D4
GND_D4
GND_D4
SH_GPIO5[6] SH_GPIO7[7]
+1.8V_D4
DA1DQ6
A25
RB_N
B4
M32_GPIO[6]
WE_N1
H1
PLL_AVDD33
DA0DQ15
SDA1A6
A29
+1.1V_D4
SH_GPIO3[5]
+1.1V_D4
GND_D4
GND_D4
+3.3V_D4
82
R105
+1.8V_D4
GND_D4
+1.8V_D4
SH_GPIO6[6] A12
SH_GPIO7[5]
B9
SDPXHS
AK16
HADRS4
GND_D4
SH_GPIO0[0]
D11
DA1VREF0
M28
ADATAO4
AK26
GND_D4
82
R104
DA0DQ7
DA1DQS0
+1.1V_D4
SH_GPIO6[6]
HDATA8
P5
+1.8V_D4
+3.3V_D4
SDA0BA2
PXDO23
AM24
+1.8V_D4
+1.8V_D4
SH_GPIO4[5]
AT1DATA14
+1.1V_D4
GND_D4
AC31
PLL0DVSS10
HADRS12
+1.1V_D4
GND_D4
82
R106
GND_D4
DA0DQ25
AA3
DA0DQ30
SDA1A10
G30
SDA1A13
SDA0BA1
AN4
SDA1A6
GND_D4
HADRS22
C1
UDIO5
C1
30
0.
1Z
HDATA9
M2
SCIFRXD A19
PD0
AN28
UDIO2
DA1DQS1
SCIFSCK
+3.3V_D4
GND_D4
GND_D4
+1.1V_D4
DA0DQ8
AK11
+1.8V_D4
UDIO2 R4
SDA0A7
AH4
DA0DQS_N2
AC1
SH_GPIO0[5]
GND_D4
HDATA5
+1.1V_D4
DA1DQM3
R30
GND_D4
ADO_SDO3
HADRS4
F2
GND_D4
SH_GPIO0[2]
C11
+1.1V_D4
SCIFCTS
D17
GND_D4
DA1DQ21
SDA0ODT
SDA0A4
AL6
HDATA11
HDATA4
K1
AUDCK
GND_D4
M32_TRST_N
AG30
GND_D4
+1.1V_D4
HDPD2 AN30
SH_GPIO1[2]
SH_GPIO2[2] A6
+1.8V_D4
+1.1V_D4
HADRS16
B1
SDA1ODT
D33
GND_D4
HDATA4
AT1DIOR
V29
DA1DQS3
SH_GPIO6[4] D14
+3.3V_D4
DA1DQ3
DA1DQ11
ADATAO0
AJ25
MDSEL2
GND_D4
SH_GPIO5[1]
+3.3V_D4
DA1DQ27
P30
AT1DATA6
AB31
WP_N
SDA1CLK0
+1.1V_D4
STXD0
SH_GPIO3[5] B16
GND_D4
+1.8V_D4
SDA1A2
GND_D4
UDIO0
BCKO
AL25
SDA0A10
AG4
SDDATA0 U4
PXDO6 AK20
DA0DQ12
0.
01
Z
C1
23
HDATA10
HADRS14
D1
SH_GPIO4[2]
A13
DA0DQ1
ADO_SDO3
AN16
SDA0A8
AG2
0.
1Z
C1
29
+1.8V_D4
HADRS3
PXDO20
DAC_AVDD33
+3.3V_D4
SDA0CS_N
SH_GPIO4[5]
B14
GND_A4
DA0DQS3
Y1
SH_GPIO0[4]
D12
GND_D4
+1.8V_D4
GND_D4
DA1DQS2
GND_D4
DA1DQ4
GND_D4
SDA1A12
G33
HADRS25
AT1ADR1
V33
+1.8V_D4
DA0DQM1
SDA1A3
G31
HDPD1
SDA1CAS_N
E32
DA0DQ16
PXDO0
AM19
SH_GPIO3[1]
B15
SDA0CLK0N
SH_GPIO3[4]
GND_D4
DA1DQ11
B22
SPDIFO AJ24
SH_GPIO0[7]
SDA0RAS_N
AT1DATA0
W30
DA1DQ17
AT1DATA0
GND_D4
GND_D4
SH_GPIO6[4]
DA0DQ2
GND_D4
DA1DQ30
N30
SDA0A10
HADRS0
J4
GND_D4
DA0DQM0
AM9
GND_D4
+1.1V_D4
DA1DQ9
B23
SDA0BA0
AL5
+3.3V_D4
HADRS18
DAC_AVDD11
RD_N
N5
HDREXT
AH28
DA1DQ29
GND_D4
DA0DQM0
GND_D4
AT1DATA14
Y33
ERXD[4]
B8
+1.1V_D4
TEST4
+3.3V_D4
SDA1A11
B28
DA0DQS2
+1.8V_D4
SH_GPIO0[4]
AT1IORDY
PXFLAG
+1.1V_D4
PXDO22
DA0DQ24
AA2
ADO_SCK
AK15
AT1DATA1
Y32
GND_D4
HCS_N3
GND_D4
SH_GPIO4[7]
A14
SDA0A11
AM6
DA0DQ9
AM11
GND_D4
PLL_AVDD11
0.
01
Z
C1
31
M32_TCK AM33
GND_D4
GND_D4
AUDATA2 AH33
DA0DQS_N0
AK10
UDIO4
SDPXDO3
SDA0WE_N
+1.8V_D4
DA1DQ2
SDPXCLK
AM17
RESET_N
PXFLAG AM27
+1.1V_D4
+1.1V_D4
AT1CS1
GND_D4
HADRS5
G3
+1.8V_D4
+1.1V_D4
DAC_AVDD33
GND_D4
SH_GPIO4[1]
DAC_AVDD33
+1.1V_D4
HDATA14
N1
PXVS DA0DQ13
M32_GPIO[1]
SH_TDI AE30
SDPXDO2
AJ18
GND_D4
AVDDDAC33
DA0DQ11
GND_D4
PXDO11
AK21
SDA0A1
AJ4
+1.8V_D4
+1.8V_D4
HADRS24
SH_GPIO2[1] A2
TEST2
AL31
SDDATA1 U3
GND_D4
HADRS11
F3
SDA1ODT
SDA1A4
DA0DQ26
+1.8V_D4
SDA1A7
F30
DA0DQ20
AC3
PXDO5
HCS_N4
SDA0CLK1
+3.3V_D4
SDA0A1
DA1DQ19
J30
DA0DQS_N2
+1.8V_D4
DA1DQ17
J31
DA1DQM3
HADRS20
HADRS2
H3
GND_D4
GND_D4
GND_D4
DA1DQ23
J33
SPDIFO
0.
01
Z
C1
26
SDA1A0
H30
GND_D4
GND_D4
SDA0A0
AF4
HCS_N1
DAC_AVDD33
HCS_N4
E8
M32_TDI
DA0DQ20
AT1INTRQ
V32
GND_D4
SDA0A3
AG3
HDATA0
GND_D4
SH_TRST_N
W29
+1.1V_D4
DA1VREF0
GND_D4
DA0VREF0
PXDO9
AL21
HDATA3
HADRS6
MDSEL1
AG29
GND_D4
HDATA9
ELNKST
SH_GPIO2[1]
SDA0A12
AG1
RD_N
GND_D4
AT1DATA1
SH_GPIO7[1]
GND_D4
DAC_AVDD11
AT1DATA13
Y31
SH_GPIO5[4]
ADATAO1
AN26
GND_D4
SH_GPIO4[0]
DA1DQS1
B21
SDA1CKE
+1.8V_D4
DA1DQS_N1
MPMD AJ32
DA1DQ8
DA1VREF0
PXDO3 AN20
DA0DQ25
ADATAO2
SDA1CS_N
E33
GND_D4
+1.8V_D4
PXDO19
UDIO3 R3
SH_GPIO6[0]
C10
SH_GPIO3[2]
ADO_SDO1
GND_D4
HADRS23
E3
HADRS10
UDIO1
SDA1BA1
A30
+1.1V_D4
PXHS
AN25
DA1DQ31
R31
SDDATA2 U2
AT1DATA2
Y30
SDCMD
DA0DQ19
AE4
SH_GPIO5[4] B5
UCLK
T3
DA1DQ21
H32
GND_D4
DA1DQ18
K32
AT1DATA9
AB32
DA0DQ26
AB1
SH_GPIO7[1] C7
SDA1A12
SH_GPIO1[6]
D4
DA0DQ15
AL12
GND_D4
HADRS3
F1
AT1DATA11
SDCD
V2
SH_GPIO5[0]
C4
HDPD2
GND_D4
SH_GPIO7[5]
SDA1BA0
DA0DQ10
+1.8V_D4
ASEBRKAK_N
SDA1CS_N
DA0DQM2
SDA1CLK0N
A32
SDWP
+1.1V_D4
DA1DQS_N2
SH_TDO
AF32
SDPXHS
SDA0A13
AN6
AT1CS0
AT1RESET
AD33
SH_GPIO5[7]
DA0VREF0
AH11
GND_D4
DA1DQM1
HADRS26
D2
DA1DQ22
K30
HCS_N0
J3
SDPXDO3
AN18
C141
0.1
AT1DATA3
AA32
GND_D4
GND_D4
PXDO18
PXDO16 AJ21
UNXT
U5
AT1DMACK AT1INTRQ
GND_D4
+1.8V_D4
GND_D4
SDDATA3 U1
AD30 PLL1AVSS33
HADRS6
H4
HADRS26
SH_GPIO5[5]
GND_D4
UDIO7
T1
SCIFCTS
SDA1CAS_N
HDATA1
K2
AH
1
AG
AF
AE
AD
AC
AB
AA
Y
W
V
U
T
R
P
N
2 3 4 5 6 7 8 10 11 12 13 14 15 16 9
M
L
K
J
H
G
F
E
D
C
B
A
20 19 18 17 21 28 27 24 25 26 23 22 29 30
AJ
AK
AL
AM
AN
31 32 33
R8A34019BG
IC101
A2 A3
B_OK
A4
G_OK
A5 A6 A7 A8 A9 A10
A_OK
A11 A12 A13
F_OK(SET2)
A14 A15 A16
D_OK(SET1)
A17
H_OK(SET1)
A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A29 A30 A31 A32 A33 A1
B_OK
B1 B2 B3
G_OK
B4 B5
G_OK
B6 B7 B8 B9 B10
A_OK
B11 B12 B13
E_OK(SET2)
B14 B15 B16
D_OK(SET1)
B17
H_OK(SET1)
B18 B19
C_OK
B20 B21 B22 B23 B24 B25 B26 B27 B28 B29 B30 B31 B32 B33
C1 C2 C3 C4
G_OK
C5 C6 C7 C8
A_OK
C9 C10 C11
A_OK
C12 C13 C14
F_OK(SET2)
C15 C16
D_OK(SET1)
C17
D_OK(SET1)
C18
H_OK(SET1)
C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 C29 C30 C31 C32 C33
D1 D2 D3 D4
B_OK
D5
G_OK
D6
OK
D7 D8 D9
G_OK
D10 D11
A_OK
D12
A_OK
D13 D14 D15 D16 D17 D18
C_OK
D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 D32 D33
E1 E2 E3 E4 E5
C_OK
E6
G_OK
E7 E8 E9
G_OK
E10 E11 E12 E13 E14
E_OK(SET2)
E15 E16 E17 E18 E19 E20 E21 E22 E23 E24 E25 E26 E27 E28 E29 E30 E31 E32 E33
F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 F19 F20 F21 F22 F23 F24 F25 F26 F27 F28 F29 F30 F31 F32 F33
G1 G2
B_OK
G3 G4 G5 G6 G28 G29 G30 G31 G32 G33
H1 H2 H3 H4 H5 H6 H28 H29 H30 H31 H32 H33
J1 J2 J3 J4 J5 J6 J28 J29 J30 J31 J32 J33
K1 K2 K3
B_OK
K4 K5 K6 K28 K29 K30 K31 K32 K33
L1 L2 L3 L4 L5 L6 L28 L29 L30 L31 L32 L33
M1 M2 M3 M4 M5 M6 M13 M14 M15 M16 M17 M18 M19 M20 M21 M22 M28 M29 M30 M31 M32 M33
N1 N2 N3 N4 N5 N6 N13 N14 N15 N16 N17 N18 N19 N20 N21 N22 N28 N29 N30 N31 N32 N33
P1 P2 P3 P4 P5 P6 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P28 P29 P30 P31 P32 P33
R1 R2 R3 R4 R5 R6 R13 R14 R15 R16 R17 R18 R19 R20 R21 R22 R28 R29 R30 R31 R32 R33
T1 T2 T3 T4 T5 T6 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22 T28 T29 T30 T31 T32 T33
U1 U2 U3 U4 U5 U6 U13 U14 U15 U16 U17 U18 U19 U20 U21 U22 U28 U29 U30 U31 U32 U33
V1 V2 V3 V4 V5 V6 V13 V14 V15 V16 V17 V18 V19 V20 V21 V22 V28 V29 V30 V31 V32 V33
W1 W2 W3 W4 W5 W6 W13 W14 W15 W16 W17 W18 W19 W20 W21 W22 W28 W29 W30 W31 W32 W33
Y1 Y2 Y3 Y4 Y5 Y6 Y13 Y14 Y15 Y16 Y17 Y18 Y19 Y20 Y21 Y22 Y28 Y29 Y30 Y31 Y32 Y33
AA1 AA2 AA3 AA4 AA5 AA6
AA13 AA14 AA15 AA16
AA17
AA18 AA19 AA20
AA21 AA22 AA28 AA29
AA30
AA31
AA32
AA33
AB1 AB2 AB3 AB4 AB5 AB6 AB13 AB14 AB15 AB16 AB17 AB18 AB19 AB20 AB21 AB22 AB28
AB29
AB30
AB31
AB32 AB33
AC1 AC2 AC3 AC4 AC5 AC6 AC28 AC29
AC30
AC31 AC32 AC33
AD1 AD2 AD3 AD4 AD5 AD6 AD28 AD29
AD30
AD31
AD32
AD33
AE1 AE2 AE3 AE4 AE5 AE6 AE28
AE29
AE30
AE31
AE32 AE33
AF1 AF2 AF3 AF4 AF5 AF6 AF28 AF29
AF30
AF31 AF32 AF33
AG1 AG2 AG3 AG4 AG5 AG6 AG28 AG29
AG30
AG31
AG32
AG33
AH1 AH2 AH3 AH4 AH5 AH6 AH7 AH8 AH9 AH10 AH11
AH12 AH13
AH14 AH15
AH16
AH17 AH18 AH19 AH20 AH21 AH22
AH23 AH24
AH25
AH26 AH27 AH28 AH29
AH30
AH31
AH32
AH33
AJ1 AJ2 AJ3 AJ4 AJ5 AJ6 AJ7 AJ8 AJ9 AJ10 AJ11 AJ12
AJ13
AJ14 AJ15 AJ16 AJ17 AJ18 AJ19 AJ20 AJ21 AJ22 AJ23 AJ24 AJ25
AJ26 AJ27
AJ28 AJ29
AJ30
AJ31 AJ32 AJ33
AK1 AK2 AK3 AK4 AK5 AK6 AK7 AK8 AK9 AK10
AK11
AK12 AK13 AK14 AK15 AK16 AK17 AK18 AK19 AK20
AK21
AK22 AK23 AK24 AK25 AK26 AK27 AK28 AK29
AK30
AK31
AK32
AK33
AL1 AL2 AL3 AL4 AL5 AL6 AL7 AL8 AL9 AL10 AL11
AL12 AL13
AL14 AL15
AL16
A_OK
AL17 AL18 AL19 AL20 AL21 AL22
AL23 AL24
AL25
AL26 AL27 AL28 AL29
AL30
AL31
AL32 AL33
AM1 AM2 AM3 AM4 AM5 AM6 AM7 AM8 AM9 AM10 AM11 AM12
AM13
AM14 AM15 AM16
A_OK
AM17 AM18 AM19 AM20 AM21 AM22 AM23 AM24 AM25
AM26 AM27
AM28 AM29
AM30
AM31 AM32 AM33
AN1 AN2 AN3 AN4 AN5 AN6 AN7 AN8 AN9 AN10
AN11
AN12 AN13 AN14 AN15 AN16 AN17 AN18 AN19 AN20
AN21
AN22 AN23 AN24 AN25 AN26 AN27 AN28 AN29
AN30
AN31
AN32
AN33
P12
M12
AA12
W12
U12
R12
N12
AB12
Y12
V12
T12
HADRS13
DA0DQ4
MPMD
GND_D4
DA1DQ31
NMI B2
AT1CS0
T32
GND_D4
MDSEL0
HADRS9
E1
GND_D4
SH_GPIO4[7]
SH_TRST_N
GND_D4
+1.1V_D4
SDA1A5
F32
SH_GPIO3[0]
C15
SDA1WE_N
B30
DA1DQ19
DA1DQ7
HDATA12
AUDSYNC AJ33
LRCKO
AK25
+1.8V_D4
SH_GPIO6[3] C12
HADRS1
DA1DQ24
N32
SCLK0
TEST3
DA0DQ27
Y4
DA0DQ5
AK7
GND_D4
SH_GPIO1[0]
K3
PXDO15 AK22
GND_D4
DA0DQ28
SRXD0 B17
PD1
AM29
+1.1V_D4
DA1DQS_N1
A21
SH_GPIO1[6]
+1.1V_D4
GND_D4
SDPXDO7
AN19
HDATA14
SH_GPIO4[0]
E14
GND_D4
SH_GPIO7[2] B7
+3.3V_D4
PXCLK
WE_N1
SDPXDO5
AL18
AT1DATA3
PD0
+1.8V_D4
DA0DQ22
AD4
+3.3V_D4
GND_D4
GND_D4
HDATA2
N4
DA1DQ2
B27
SDA0A12
PXDO19 AL23
SDPXVS SDA0A2
DA1DQ15
C22
SH_GPIO5[2]
B3
SH_GPIO2[5]
DA1DQ14
A23
PXHS
ELNKST
A7
GND_D4
SDDATA2
SDA1CLK1
AMCLK2
GND_A4
GND_D4
SCLK0
C18
C1
27
0.
01
Z
SDA1A1
E30
SDA1A13
A28
GND_D4
AUDATA3 SDA0A5
PXDO1
RB_N
HDPD1 AM31
SDA0A9
AH1
HDATA12
P4
GND_D4
GND_D4
HADRS23
DA0VREF0
AT1DMARQ
W32
SDA0CLK0
AN3
+1.1V_D4
SH_GPIO3[3]
A15
M32_GPIO[7]
D7
SDPXWE
DA0DQ29
SH_GPIO4[3]
C14
DA0DQS_N1
AN13
DA1DQ22
PXDO20 AK23
HADRS17
G5
GND_D4
SDPXDO2
SDPXWE
AN17
ADATAO3
GND_D4
SH_GPIO6[5]
B12
SDA0CKE
+1.1V_D4
+1.1V_D4
+3.3V_D4
PXVS
AK24
+1.1V_D4
SH_GPIO4[4]
D15
DA0DQ18
AD2
GND_D4
+1.1V_D4
DA0DQ17
SCIFRTS
B18
SCIFRTS
GND_A4
GND_D4
+1.1V_D4
+1.8V_D4
M32_GPIO[7]
AMCLK1
PXDO2 AK19
SDA1A9
C138
0.1
+1.1V_D4
SH_GPIO0[0]
SDA0A3
+1.8V_D4
GND_D4
SDA0A7
DA0DQ3
AN7
HDATA1
UDIR
T4
DA1DQ15
SDDATA0
GND_D4
ADO_SCK
+1.8V_D4
GND_D4
GND_A4
0.
1Z
C1
22
DA1DQ20
+3.3V_D4
GND_D4
DA0DQ5
SDPXCLK
DA1VREF0
F23
+3.3V_D4
SH_GPIO7[6]
D13
DA0DQS_N0
SDA1A11
SH_TDO
SDA0A13
DA0DQS_N1
PXDO4
ADATAO2
AM26
SCIFTXD
A18
DA0DQ0
AK8
82
R107
GND_D4
HADRS18
C2
AMCLK2 AF33
ADO_WS
AN15
GND_D4
DA1DQS_N3
PXWE
AUDATA1 AG31
HDATA7
L1
GND_D4
GND_D4
SDA1CKE
D31
HDATA10
N3
GND_A4
GND_A4
USTP
+1.8V_D4
M32_TDI AK32
HADRS12
E2
DA0DQ13
AK14
SH_GPIO0[3]
A10
+1.1V_D4
AT1DATA4
AA30
SDCLK V4
GND_D4
PXDO8 AM21
SH_GPIO5[3]
M32_GPIO[4]
DA1DQ23
PXDO4 AM20
+1.8V_D4
GND_D4
LRCKO
DA1DQ10
PXDO22
AJ22
GND_D4
DA1DQ28
GND_D4
M32_GPIO[6]
D6
AUDATA2
SH_GPIO2[4]
+3.3V_D4
DA1DQM1
D21
M32_TRST_N
GND_D4
4.7K
R102
DA0DQS1
AM13
DA1DQ4
D25
PXDO7
SH_GPIO1[7]
A3
GND_D4
DA0DQ14
AN11
HADRS8
C3
+1.8V_D4
GND_D4
SH_GPIO2[2]
HDREXT
SH_GPIO0[6]
AM16
HDATA15
P3
PD1
DA0DQ10
AK12
SH_GPIO6[1]
B11
+1.8V_D4
SDA1BA2
D28
AK27
IOBAR
AT1DATA13
AT1DATA6
+3.3V_D4
DA1DQS_N0
PXDO3
AMCLK1 AG33
SDCLK
SH_GPIO0[7]
AL16
M32_GPIO[1]
D10
DA1DQ0
D26
SDA1BA0
C29
AT1IORDY
V30
SDA1A0
+1.1V_D4
SDPXDO6
GND_D4
HADRS8
+3.3V_D4
GND_D4
SH_GPIO3[4] C16
DA1DQ13
D20
SH_GPIO0[1]
C8
TEST3
AJ31
+1.1V_D4
SH_GPIO7[4]
DA0DQ12
AM10
DA1DQ1
+1.1V_D4
SRXD0
PXDO21
DA0DQ1
AM8
GND_D4
GND_D4
GND_D4
UDIO6
SH_GPIO7[3]
A8
+3.3V_D4
GND_D4
GND_D4
DA0DQM3
W4
GND_D4
SDCD
SH_GPIO7[0]
SDA0A5
AH2
SH_GPIO1[2]
G2
+3.3V_D4
+1.1V_D4
SH_GPIO2[3]
B19
PXDO12
AN22
AT1ADR2
PLL_AVDD11
GND_D4
ADATAO4
SDA0A11
+1.1V_D4
GND_D4
AT1DIOR
HADRS7
L4
SDA1A4
C28
ADO_SDO1
AL15
GND_D4
PXDO1
AL19
GND_D4
AT1DATA12
AA33
HDATA15
GND_D4
DA1DQ1
B26
DA0DQ31
DA0DQ3
4.7K
R101
GND_D4
AD29
PLL1AVDD33
M32_GPIO[2]
C5
DA0DQ4
AK9
SH_GPIO5[3]
D9
HADRS1
M4
C135
0.1
SDA0CLK1N
AM1
SH_GPIO1[5]
A1
M32_GPIO[0]
DA1DQ8
D23
DA1DQM2
L30
SH_GPIO0[5]
B10
DA0DQ7
AL8
GND_D4
GND_D4
AT1DATA7
DA1DQ26
SDA1A3
GND_D4
+1.8V_D4
GND_D4
ERXD[4]
+3.3V_D4
TEST0
SDPXDO6
AK18
+1.8V_D4
SH_GPIO7[4]
C9
GND_D4
PXDO11
+1.8V_D4
TEST5
AH30
AT1DIOW
W33
SH_GPIO5[1]
D5
M32_GPIO[5]
DA0DQS0
HADRS24
E4
PXWE AM25
AC32
PLL0DVDD10
PXDO9
SH_TCK AE32
DA0DQ21
+1.1V_D4
DA0DQ30
AA4
HADRS15
GND_A4
SCIFRXD
SH_GPIO5[0]
AC30
PLL0AVSS33
GND_D4
SH_GPIO5[5] E9
UNXT
DA1DQS_N2
L33
DA0DQ19
HADRS15
G4
AK29 HDIOBAR
+1.1V_D4
AT1DATA4
DA1DQ18
HDATA8
SH_GPIO0[6]
DA1DQM0
AL10
DA0DQS0
+1.1V_D4
M32_GPIO[3]
GND_D4
SH_GPIO4[1]
B13
HDATA0
J1
GND_D4
SH_GPIO5[2]
M32_TDO
GND_D4
DA1DQ12
GND_D4
M32_TCK
GND_D4
HADRS21
F4
DA1DQ30
GND_D4
+3.3V_D4
SH_GPIO5[7]
E6
SH_GPIO3[6] A16
+1.1V_D4
DA1DQ25
HADRS17
M32_GPIO[2]
+1.8V_D4
SDPXDO4
AM18
SH_GPIO7[2]
SDA0A0
PXDO10
HADRS10
H5
SH_GPIO6[5]
AT1DATA10
+1.1V_D4
ADO_SDO0
SDA0A6
AN5
SH_GPIO1[5]
SDPXDO0
AL17
SH_GPIO6[7]
C13
+1.8V_D4
AT1DATA10
AA29
SH_GPIO3[2]
D16
HADRS14
AUDATA0
C136
0.1
+1.1V_D4
CC
15
5
0.
1Z
CC
16
7
0.
1Z
CC
11
7
0.
1Z
CC
14
8
0.
1Z
CC
11
4
0.
1Z
CC
14
4
0.
1Z
CC
14
0
0.
1Z
0.
1Z
C1
11
0.
1Z
C1
04
GND_D4
0.
1Z
C1
13
CC
11
3
0.
1Z
CC
12
6
0.
1Z
CC
16
0
0.
1Z
CC
14
7
0.
1Z
CC
14
1
0.
1Z
CC
15
9
0.
1Z
0.
1Z
C1
02
CC
15
8
0.
1Z
CC
12
4
0.
1Z
CC
16
3
0.
1Z
0.
1Z
C1
03
CC
11
8
0.
1Z
0.
1Z
CC
17
3
0.
1Z
C1
20
CC
15
1
0.
1Z
0.
1Z
C1
06
0.
1Z
C1
12
CC
13
1
0.
1Z
CC
12
5
0.
1Z
CC
17
1
0.
1Z
0.
1Z
C1
07
CC
13
8
0.
1Z
CC
14
9
0.
1Z
0.
1Z
C1
05
CC
16
5
0.
1Z
CC
13
5
0.
1Z
CC
11
9
0.
1Z
CC
12
7
0.
1Z
CC
13
7
0.
1Z
GND_D4
CC
17
2
0.
1Z
CC
12
0
0.
1Z
GND_D4
CC
13
0
0.
1Z
CC
16
8
0.
1Z
CC
13
9
0.
1Z
CC
12
3
0.
1Z
0.
1Z
C1
19
CC
16
2
0.
1Z
CC
13
4
0.
1Z
CC
12
8
0.
1Z
CC
15
2
0.
1Z
CC
14
2
0.
1Z
CC
15
6
0.
1Z
GND_D4
+1.8V_D4
CC
17
0
0.
1Z
0.
1Z
C1
15
+1.8V_D4
CC
13
2
0.
1Z
0.
1Z
C1
16
CC
13
6
0.
1Z
+3.3V_D4
CC
12
2
0.
1Z
CC
11
5
0.
1Z
0.
1Z
C1
10
0.
1Z
CC
17
4
0.
1Z
C1
09
0.
1Z
C1
18
CC
15
3
0.
1Z
0.
1Z
C1
14
CC
16
9
0.
1Z
CC
11
6
0.
1Z
0.
1Z
C1
08
CC
12
9
0.
1Z
CC
14
6
0.
1Z
CC
12
1
0.
1Z
CC
14
5
0.
1Z
CC
14
3
0.
1Z
+1.1V_D4
CC
15
0
0.
1Z
CC
16
4
0.
1Z
0.
1Z
C1
01
CC
15
4
0.
1Z
0.
1Z
C1
17
CC
15
7
0.
1Z
CC
13
3
0.
1Z
CC
16
6
0.
1Z
CC
16
1
0.
1Z
SDA1A7
SDA1CAS_N
SDA1BA0
SDA1A9
SDA1A6
SDA1BA1
SDA1CLK0N
SDA1A11
SDA1A8
SDA1BA2
SDA1CS_N
SDA1A0
SDA1RAS_N
SDA1A3
SDA1A12
SDA1WE_N
SDA1A1
SDA1CKE
SDA1A10
SDA1A13
SDA1A2
SDA1A5
SDA1A4
SDA1CLK0
SDA1ODT
SDA0A3
SDA0A7
SDA0A8
SDA0CLK0N
SDA0A11
SDA0CS_N
SDA0CLK1
SDA0BA0
SDA0A6
SDA0A2
SDA0A13
SDA0RAS_N
SDA0CLK0
SDA0A9
SDA0A10
SDA0A12
SDA0BA2
SDA0A4
SDA0WE_N
SDA0CAS_N
SDA0A1
SDA0CKE
SDA0CLK1N
SDA0ODT
SDA0A0
SDA0A5
SDA0BA1
DA0DQ9
DA0DQ13
DA0DQ6
DA0DQ21
DA0DQ25
DA0DQ2
DA0DQ19
DA0DQ4
DA0DQ8
DA0DQ10
DA0DQ22
DA0DQ16
DA0DQ1
DA0DQ3
DA0DQ14
DA0DQ24
DA0DQ15
DA0DQ12
DA0DQ0
DA0DQ23
DA0DQ17
DA0DQ7
DA0DQ11
DA0DQ5
DA0DQ18
DA0DQ20
DA0DQS_N0
DA0DQM1
DA0DQ28
DA0DQS1
DA0DQS_N3
DA0DQM3
DA0DQ31
DA0DQS0
DA0DQ29
DA0DQM2
DA0DQ30
DA0DQS_N2
DA0DQS_N1
DA0DQM0
DA0DQ27
DA0DQS2
DA0DQS3
DA0DQ26
DA1DQ10
DA1DQ15
DA1DQ21
DA1DQ13
DA1DQ11
DA1DQ3
DA1DQ23
DA1DQ24
DA1DQ7
DA1DQ2
DA1DQ5
DA1DQ4
DA1DQ22
DA1DQ6
DA1DQ9
DA1DQ25
DA1DQ17
DA1DQ20
DA1DQ19
DA1DQ1
DA1DQ0
DA1DQ18
DA1DQ16
DA1DQ12
DA1DQ8
DA1DQ14
DA1DQM3
DA1DQM0
DA1DQS_N3
DA1DQ30
DA1DQ29
DA1DQS_N2
DA1DQS1
DA1DQM2
DA1DQS2
DA1DQ27
DA1DQS3
DA1DQS_N1
DA1DQ28
DA1DQM1
DA1DQS_N0
DA1DQ26
DA1DQ31
DA1DQS0
ADO_SDO3
ADO_SDO2
ADO_SDO1
ADO_SDO0
ADO_SCK
ADO_WS
ADATAO4
SPDIFO
LRCKO
BCKO
AMCLK2
AMCLK1
REXT
HDPD0
PD0
HDPD1
PD1
HDREXT
HDPD2
VMCLK
.PXDO22
.PXDO10
.PXDO19
.PXCLK
.PXDO2
.PXVS
.PXDO17
.PXDO21
.PXDO23
.PXWE
.PXDO3
.PXDO9
.PXDO20
.PXDO7
.PXDO15
.PXDO11
.PXHS
.PXDO6
.PXDO5
.PXDO16
.PXDO18
.PXDO4
.PXDO8
.PXDO14
SDCMD
SDWP
SDCD
SDDATA1
SDDATA2
SDDATA0
SDCLK
SDDATA3
TEST4
TEST5
ATEST
MDSEL0
MDSEL2
TEST1
TEST3
MDSEL1
TEST2
TEST0
M32_TDI
AUDATA3
M32_TMS
AUDATA2
SH_TDO
AUDATA1
M32_TCK
AUDSYNC
ASEBRKAK_N
M32_TRST_N
SH_TMS
AUDCK
MPMD
M32_TDO
SH_TCK
SH_TDI
AUDATA0
SH_TRST_N
RESET_N
SCIFSCK
SCIFRXD
SCIFRTS
SCIFTXD
SH_GPIO3[2]
SH_GPIO4[5]
SH_GPIO4[6]
M32_GPIO[4]
M32_GPIO[2]
SH_GPIO3[1]
SH_GPIO4[4]
SH_GPIO3[0]
SH_GPIO3[3]
M32_GPIO[5]
M32_GPIO[3]
SH_GPIO4[7]
SH_GPIO4[0]
SH_GPIO4[1]
HDATA0
WE_N1
HDATA9
HDATA12
HDATA4
HDATA5
HDATA7
HDATA13
HDATA3
HDATA11
HDATA8
HDATA15
HDATA1
HDATA2
HDATA14
HDATA10
HDATA6
HADRS18
HADRS25
HADRS23
HADRS21
HADRS16
HADRS24
RD_N
WE_N0
HADRS26
HADRS15
HADRS17
HADRS22
RB_N
WP_N
HADRS20
HADRS19
HADRS14 HADRS0
HADRS9
HADRS10
HCS_N4
HADRS11
HCS_N1
HADRS8
HCS_N3
HADRS5
HADRS13
HADRS12
HADRS6
HADRS1
HCS_N0
HADRS7
HADRS4
HADRS3
HADRS2
SH_GPIO5[5]
AT1DMARQ
AT1DATA9
AT1DATA13
AT1RESET
AT1ADR0
AT1DATA4
AT1DIOR
AT1DATA11
AT1ADR2
AT1DMACK
AT1DATA2
AT1DATA8
AT1DATA5
AT1DATA12
AT1INTRQ
AT1CS0
AT1DIOW
AT1DATA6
AT1DATA10
AT1DATA15
AT1ADR1
AT1DATA14
AT1DATA3
AT1CS1
AT1DATA7
AT1DATA1
AT1IORDY
AT1DATA0
SH_GPIO7[7]
SH_GPIO2[1]
ERXD[4]
SH_GPIO6[6]
SH_GPIO2[2]
SH_GPIO6[2]
SH_GPIO6[7]
SH_GPIO7[2]
SH_GPIO7[5]
SH_GPIO7[1]
SH_GPIO6[0]
SH_GPIO7[4]
ELNKST
SH_GPIO7[0]
SH_GPIO7[3]
SH_GPIO6[1]
SH_GPIO6[4]
SH_GPIO6[5]
SH_GPIO7[6]
SH_GPIO6[3]
SH_GPIO0[3]
M32_GPIO[6]
1K R108
+3.3V_D4
R109 47K
R110 47K
R111 47K
R112 47K
R113
47K
GND_D4
R114 47K
GND_D4
SH_GPIO3[4]
0.01Z
C143
GND_A4 GND_D4
0.1Z C144
1000P C142
+3.3V_D4
R143 47K
R144 47K
R145 47K
R147 47K
R146 47K
+3.3V_D4
R172
47K
GND_D4
R173 47K
+3.3V_D4
R170 47K
+3.3V_D4
R171 47K
GND_D4
R148 47K
R149
47K
R164
47K
R165 47K
R166 47K
R167 47K
R168 47K
R169 47K
+3.3V_D4
.PXDO0
.PXDO1
.PXDO12
.PXDO13
SH_GPIO5[4]
47 R115
47 R116
47 R117
47 R118
47 R119
47 R120
47 R121
47 R122
47 R123
47 R124
47
R125
47 R126
47 R127
47 R128
47 R129
47 R130
47 R131
47 R132
47 R133
47 R134
47 R135
47 R136
47 R137
47
R138
22 R139
0 R140
0 R141
0 R142
R174 47K
SH_GPIO0[6]
FOR ANALOG
SERIAL(CSIO) I/F
ETX_ER
(F)
[MIX]
BD_BE_RTS
USB(NC)
IDE
36MHz
BD_BE_DIN
(F)
33MHz
BD_BE_DOUT
ANALOG VIDEO -> sht005
BD_BE_CLK
SD CARD -> sht007
SERIAL I/F(SCIF) -> sht005
JTAG/TESTMODE -> sht005
SERIAL/GPIO
JTAG_SH4
DV_RST
JTAG_M32
H_SENS2
MODE_SELECT
H_SENS1
IRQ PORT
DF_RST
DRVINTN
DSP2FLAG
ABT_INT
DSP1FLAG
SMUTE
I2C_DAT_2
DDR2_0 -> sht002
BE_ON
M32_IMRQ1
M32_IMRQ0
SA_MSREADY
SA_XMSLAT
SACD/2753 I/F
SACD/VSTEM I/F -> sht006
VA_CONF_DONE
VA_nSTATUS
VA_RDY
DIGITAL AUDIO -> sht009
VA_CS
RLT_RST
GPIO_0 -> sht008
AF_WRITE
AMUTE
bd310036 BE LSI BLOCK (1/9)
SP_A_CS
FPGA_CS
(F)
BE_CS
(F)
BOOT_END
GPIO_0 -> sht005
I2C_DAT1
I2C_CLK1
I2C_DAT0
I2C_CLK0
I2C I/F
M32_UART_RXD
M32_UART_TXD
M32_UART_CTS
ECOL
M32_UART_RTS
ECRS
EMDC
SH_UART_RXD1
EMDIO
DDR2_1 -> sht003
SH_UART_TXD1
N
A
N
D
/
N
O
R
-
>
s
h
t
0
0
4
ERXD0
SH_UART_CTS1
ERXD1
SH_UART_RTS1
ERXD2
SH_UART_RXD0
ERXD3
SH_UART_TXD0
ERXD4
SH_UART_CTS0
ETHER -> sht005
ELNKST
SH_UART_RTS0
ERX_CLK
SERIAL(SH_UART) I/F -> sht005
ERX_DV
SP_SA_CS
ERX_ER
SA_PDIN
DIGITAL VIDEO -> sht009
ETXD0
SA_PDOUT
ETXD1
SA_PCLK
AF_nCS
ETXD2
PDIN
ETXD3
AF_CONF_DONE
HD DATA
PDOUT
ETX_CLK
FOR HDMI
PCLK
ETX_EN
AL30,LA29
AL27,AJ27
AH26
AN31,AN29
AM30,AM28
AN33,AN27
AH25
AK28
IDE -> sht005
I2C I/F -> sht009
-> sht005
-> sht008
FOR ANALOG
7.1
OUT
27MHz
SD DATA
-> sht008
-> sht008
8 7 6 5 4 3 2 1
A
B
C
D
E
F
SCHEMATIC DIAGRAMS (22/37)