26
AVR-4806 / AVC-A11XV
19
VSS
VSS
-
-
-
-
-
-
GND
20
XIN
X2
I
-
-
-
-
-
Oscillator connection
21
VCC1
VCC1
-
-
-
-
-
-
+3.3V
22
P85/NMI
_NMI
I
-
-
-
-
-
Not used (Fixed to H)
23
P84/INT2
REQSIIEO
I
-
E
↓
&L
-
Ed
Z
1394 control pin
24
P83/INT1
ACKSIMO
I
-
E
↓
&L
-
-
Z
MAIN-SUB
μ
com comm. control pin
25
P82/INT0
SUBBDOWN
I
-
E
↓
&L
Eu
Z
Power down detect (Power down: L)
26
P81
NC
O
C
-
-
-
Z
Not used
27
P80
NC
O
C
-
-
-
Z
Not used
28
P77
NC
O
C
-
-
-
Z
Not used
29
P76
1394POWER
O
C
-
-
-
Z
1394 control pin (1394POWER ON:H)
30
P75
ACKSOIEI
O
C
-
-
Eu
Z
1394 control pin
31
P74
RST1394
O
C
-
-
Eu
Z
1394 control pin, Reset="L"(Reset release="H" after 80msec from IEPOWER ON)
32
P73/CTS2
CSIE
O
C
-
-
Eu
Z
1394 control pin
33
P72/CLK2
CLKSOIEI
O
C
-
-
Eu
Z
1394 control pin
34
P71/RXD2
SIIEO
I
-
-
-
Eu
Z
1394 control pin
35
P70/TXD2
SOIEI
O
N
-
-
Eu
Z
1394 control pin
36
P67/TXD1
TXD.S
O
C
-
-
Ed
Z
Data transfer output to outside
37
VCC1
VCC1
-
-
-
-
-
Z
+3.3V
38
P66/RXD1
RXD.S
I
-
Lv
-
Ed
Z
Data receive input from outside
39
VSS
VSS
-
-
-
-
-
Z
GND
40
P65/CLK1
NC
I
-
-
-
-
Z
Not used
41
P64/CTS1
NC
O
C
-
-
-
Z
Not used
42
P63/TXD0
SOMI
O
C
-
-
-
Z
MAIN-SUB
μ
com comm. control pin
43
P62/RXD0
SIMO
I
-
-
-
-
Z
MAIN-SUB
μ
com comm. control pin
44
P61/CLK0
CLKSIMO
I
-
-
-
-
Z
MAIN-SUB
μ
com comm. control pin
45
P60/CTS0
REQSOMI
O
C
-
-
-
Z
MAIN-SUB
μ
com comm. control pin
46
P137
NC
O
C
-
-
-
Z
Not used
47
P136
NC
O
C
-
-
-
Z
Not used
48
P135
SUBnCE
O
C
-
-
-
Z
FPGA rewrite control pin
49
P134
NC
O
C
-
-
-
Z
Not used
50
P57
NC
O
C
-
-
-
Z
Not used
51
P56
NC
O
C
-
-
-
Z
Not used
52
P55/EPM
FRASH EPM
I
-
Lv
-
Eu
Z
Rewrite boot program start: L
53
P54
NC
O
C
-
-
-
Z
Not used
54
P133
SUBDATAOUT
I
-
-
-
-
Z
FPGA rewrite control pin
55
P132
SUBASDI
O
C
-
-
-
Z
FPGA rewrite control pin
56
P131
SUBnCS
O
C
-
-
-
Z
FPGA rewrite control pin
57
P130
SUBÇéCONFIG
O
C
-
-
-
Z
FPGA rewrite control pin
58
P53
SUBDCLK
O
C
-
-
-
Z
FPGA rewrite control pin
59
P52
SUBCONF_DONE
I
-
Lv
-
-
Z
FPGA rewrite control pin
60
P51
NC
O
C
-
-
-
Z
Not used
61
P50/CE
FRASH CE
I
-
-
-
Ed
Z
Rewrite boot program start: H
62
P127
NC
O
C
-
-
-
Z
Not used
63
P126
DIGITAL POWER
O
C
-
-
Ed
Z
DIGITAL power on/off switching(ON:H)
64
P125
SUBCPUASON
O
C
-
-
-
Z
Active Serial on(FPGA rewrite from SUB-
μ
COM:L)
※
default
→
D.POWER OFF:H
65
P47
ADC RST
O
C
-
-
Eu
Z
AD RST
66
P46
AD OVER R
I
-
Lv
-
-
Z
RCH OVERLOAD
67
P45
AD OVER L
I
-
Lv
-
-
Z
LCH OVERLOAD
O
C
-
-
-
Z
A/D control pin(PCM1804) 96kHz:H
O
C
-
-
-
Z
A/D control pin(PCM1804) 48kHz:H
O
C
-
-
-
Z
Not used
O
C
-
-
-
Z
DAC control pin
O
C
-
-
-
Z
DAC control pin
O
C
-
-
Ed
Z
FGAIN control pin
O
C
-
-
Ed
Z
FGAIN control pin
O
C
-
-
Ed
Z
FGAIN control pin
O
C
-
-
Ed
Z
FGAIN control pin
O
C
-
-
-
Z
DAC control pin
O
C
-
-
-
Z
DAC control pin
O
C
-
-
-
Z
DAC control pin
O
C
-
-
-
Z
DAC control pin
O
C
-
-
-
Z
DAC control pin
82
P122
DACRST3
O
C
-
-
-
Z
DAC control pin
83
P121
DACRST2
O
C
-
-
-
Z
DAC control pin
84
P120
DACRST1
O
C
-
-
-
Z
DAC control pin
85
VCC2
VCC2
-
-
-
-
-
-
+3.3V
86
P30
NC
O
C
-
-
-
Z
Not used
87
VSS
VSS
-
-
-
-
-
-
GND
88
P27
NC
O
C
-
-
-
Z
Not used
89
P26
NC
O
C
-
-
-
Z
Not used
90
P25
DIRRST3
O
C
-
-
Ed
Z
DIR control pin(LC89057W-VF4-E)
91
P24
DIRRST2
O
C
-
-
Ed
Z
DIR control pin(LC89057W-VF4-E)
92
P23
DIRRST1
O
C
-
-
Ed
Z
DIR control pin(LC89057W-VF4-E)
93
P22
DIRDOUT1
I
-
Lv
-
Eu
Z
DIR control pin(LC89057W-VF4-E)
94
P21
DIRDIN1
O
C
-
-
-
Z
DIR control pin(LC89057W-VF4-E)
Pin
Pin Name
Symbol
I/O
Type
Det
Op
(Int.)
Op
(Ext.)
Res
FUNCTION
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