OPT-622A1F1R
DELTA ELECTRONICS, INC.
3
www.deltaww.com
Jan., 2008
Rev.
：
0D
Pin Definition
PIN Symbol
Functional description
1
GND
Receiver Signal Ground
2
RD (+)
Receiver Data Out Non-inverted (LVPECL or PECL)
3
RD (-)
Receiver Data Out Inverted (LVPECL or PECL)
4 SD
Receiver Signal Detect (LVPECL
、
PECL)
5
VccR
Receiver Power Supply
6
VccT
Transmitter Power Supply
7
TD (-)
Transmitter Data In Inverted (LVPECL or PECL)
8
TD (+)
Transmitter Data In Non-inverted (LVPECL or PECL)
9
GND
Transmitter Signal Ground
Pin Descriptions
Pin 1 Receiver Signal Ground, GND
Directly connect these pins to the ground plane.
Pin 2 Receiver Data Out Non-inverted (LVPECL), RD (+)
PECL logic family. Output external biased and internal DC coupled.
Pin 3 Receiver Data Out Inverted (LVPECL), RD (-)
PECL logic family. Output external biased and internal DC coupled.
Pin 4 Receiver Signal Detect (LVPECL), SD
PECL logic family. Normal Operation: Logic “1” Output; Fault Condition: Logic”0” Output.
Pin 5 Receiver Power Supply, VccR
P3.3V dc power supply.
Pin 6 Transmitter Power Supply, VccT
P3.3V dc power supply.
Pin 7 Transmitter Data In Inverted (LVPECL), TD (-)
Pin 7 Transmitter Data Input Inverted (LVPECL), TD (-).
Pin 8 Transmitter Data In Non-inverted (LVPECL), TD (+)
Pin 8 Transmitter Data Input Non-inverted (LVPECL), TD (+).
Pin 9 Transmitter Signal Ground, GND
Directly connect these pins to the ground plane.